diff options
author | Richard Kenner <kenner@gcc.gnu.org> | 1994-08-08 19:55:09 -0400 |
---|---|---|
committer | Richard Kenner <kenner@gcc.gnu.org> | 1994-08-08 19:55:09 -0400 |
commit | b8318e484575a121d7512e8a495b1d793390ce4e (patch) | |
tree | 30dc624b7f4d2724715ff0e6f1ecb40d8cf7294d | |
parent | 1a19d593a044bd8894447331cc1174fcc3f9cf09 (diff) | |
download | gcc-b8318e484575a121d7512e8a495b1d793390ce4e.zip gcc-b8318e484575a121d7512e8a495b1d793390ce4e.tar.gz gcc-b8318e484575a121d7512e8a495b1d793390ce4e.tar.bz2 |
(all patterns that use ins/inss and ext/exts): Disallow use of these
instructions when -mnobitfield is specified.
From-SVN: r7879
-rw-r--r-- | gcc/config/ns32k/ns32k.md | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md index 2adef96..5bd05fa 100644 --- a/gcc/config/ns32k/ns32k.md +++ b/gcc/config/ns32k/ns32k.md @@ -1861,7 +1861,7 @@ return \"adjspb %$-4\"; }") -;; The extsd/extd isntructions have the problem that they always access +;; The exts/ext instructions have the problem that they always access ;; 32 bits even if the bitfield is smaller. For example the instruction ;; extsd 7(r1),r0,2,5 ;; would read not only at address 7(r1) but also at 8(r1) to 10(r1). @@ -1876,14 +1876,17 @@ ;; extsd 7(r1),r0,2,5 5 bytes ;; takes about 21 cycles. ;; -;; So lets forget about extsd/extd on the 532. +;; The inss/ins instructions suffer from the same problem. +;; +;; A machine specific option (-mbitfield/-mnobitfield) is used +;; to allow/disallow the use of these instructions. (define_insn "" [(set (match_operand:SI 0 "general_operand" "=g<") (zero_extract:SI (match_operand:SI 1 "register_operand" "g") (match_operand:SI 2 "const_int_operand" "i") (match_operand:SI 3 "general_operand" "rK")))] - "! TARGET_32532" + "TARGET_BITFIELD" "* { if (GET_CODE (operands[3]) == CONST_INT) return \"extsd %1,%0,%3,%2\"; @@ -1895,7 +1898,7 @@ (zero_extract:SI (match_operand:QI 1 "general_operand" "g") (match_operand:SI 2 "const_int_operand" "i") (match_operand:SI 3 "general_operand" "rK")))] - "! TARGET_32532" + "TARGET_BITFIELD" "* { if (GET_CODE (operands[3]) == CONST_INT) return \"extsd %1,%0,%3,%2\"; @@ -1907,7 +1910,7 @@ (match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 2 "general_operand" "rn")) (match_operand:SI 3 "general_operand" "rm"))] - "" + "TARGET_BITFIELD" "* { if (GET_CODE (operands[2]) == CONST_INT) { @@ -1932,7 +1935,7 @@ (match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 2 "general_operand" "rK")) (match_operand:SI 3 "general_operand" "rm"))] - "" + "TARGET_BITFIELD" "* { if (GET_CODE (operands[2]) == CONST_INT) if (INTVAL (operands[1]) <= 8) @@ -1949,7 +1952,7 @@ (match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 2 "general_operand" "rK")) (match_operand:SI 3 "general_operand" "rm"))] - "" + "TARGET_BITFIELD" "* { if (GET_CODE (operands[2]) == CONST_INT) if (INTVAL (operands[1]) <= 8) |