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authorYufeng Zhang <yufeng.zhang@arm.com>2014-04-14 14:40:02 +0000
committerYufeng Zhang <yufeng@gcc.gnu.org>2014-04-14 14:40:02 +0000
commitb621e87556304edca4171db32e504b8418638f6b (patch)
tree4504fd46f04f30ded20564a05c1291c3796f600e
parent3418f5e92a6071ffb4d877c1824b0cf0406dbfe1 (diff)
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invoke.texi (free): Document AArch64.
gcc/ * doc/invoke.texi (free): Document AArch64. From-SVN: r209376
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/doc/invoke.texi2
2 files changed, 5 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a99c641..5a7832b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2014-04-14 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * doc/invoke.texi (free): Document AArch64.
+
2014-04-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/60042
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 860a545..3fdfeb9 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -7396,7 +7396,7 @@ Attempt to remove redundant extension instructions. This is especially
helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit
registers after writing to their lower 32-bit half.
-Enabled for x86 at levels @option{-O2}, @option{-O3}.
+Enabled for AArch64 and x86 at levels @option{-O2}, @option{-O3}.
@item -flive-range-shrinkage
@opindex flive-range-shrinkage