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| author | Kugan Vivekanandarajah <kuganv@linaro.org> | 2014-05-22 02:25:01 +0000 |
|---|---|---|
| committer | Kugan Vivekanandarajah <kugan@gcc.gnu.org> | 2014-05-22 02:25:01 +0000 |
| commit | a4a182c6984236c075965191eaedf7ae7ec4c0b4 (patch) | |
| tree | 0a921bbd50af8d3f4d336a13ea130cd4466e6dc2 | |
| parent | 212f0ce105124189ba1083eab1106208d0ddae00 (diff) | |
| download | gcc-a4a182c6984236c075965191eaedf7ae7ec4c0b4.zip gcc-a4a182c6984236c075965191eaedf7ae7ec4c0b4.tar.gz gcc-a4a182c6984236c075965191eaedf7ae7ec4c0b4.tar.bz2 | |
aarch64.c (aarch64_regno_regclass): Change CORE_REGS to GENERAL_REGS.
2014-05-22 Kugan Vivekanandarajah <kuganv@linaro.org>
* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
From-SVN: r210735
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 7 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 5 |
3 files changed, 15 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ee530bd..a1bf3a1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2014-05-22 Kugan Vivekanandarajah <kuganv@linaro.org> + + * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS + to GENERAL_REGS. + (aarch64_secondary_reload) : LikeWise. + (aarch64_class_max_nregs) : Remove CORE_REGS. + * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS. + (REG_CLASS_NAMES) : Likewise. + (REG_CLASS_CONTENTS) : LikeWise. + (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS. + 2014-05-21 Guozhi Wei <carrot@google.com> PR target/61202 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 66ab1b7..78ecc62 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4073,7 +4073,7 @@ enum reg_class aarch64_regno_regclass (unsigned regno) { if (GP_REGNUM_P (regno)) - return CORE_REGS; + return GENERAL_REGS; if (regno == SP_REGNUM) return STACK_REG; @@ -4224,12 +4224,12 @@ aarch64_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, /* A TFmode or TImode memory access should be handled via an FP_REGS because AArch64 has richer addressing modes for LDR/STR instructions than LDP/STP instructions. */ - if (!TARGET_GENERAL_REGS_ONLY && rclass == CORE_REGS + if (!TARGET_GENERAL_REGS_ONLY && rclass == GENERAL_REGS && GET_MODE_SIZE (mode) == 16 && MEM_P (x)) return FP_REGS; if (rclass == FP_REGS && (mode == TImode || mode == TFmode) && CONSTANT_P(x)) - return CORE_REGS; + return GENERAL_REGS; return NO_REGS; } @@ -4360,7 +4360,6 @@ aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) { switch (regclass) { - case CORE_REGS: case POINTER_REGS: case GENERAL_REGS: case ALL_REGS: diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 0574593..5c1c404 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -408,7 +408,6 @@ extern unsigned long aarch64_tune_flags; enum reg_class { NO_REGS, - CORE_REGS, GENERAL_REGS, STACK_REG, POINTER_REGS, @@ -423,7 +422,6 @@ enum reg_class #define REG_CLASS_NAMES \ { \ "NO_REGS", \ - "CORE_REGS", \ "GENERAL_REGS", \ "STACK_REG", \ "POINTER_REGS", \ @@ -435,7 +433,6 @@ enum reg_class #define REG_CLASS_CONTENTS \ { \ { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ - { 0x7fffffff, 0x00000000, 0x00000003 }, /* CORE_REGS */ \ { 0x7fffffff, 0x00000000, 0x00000003 }, /* GENERAL_REGS */ \ { 0x80000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ { 0xffffffff, 0x00000000, 0x00000003 }, /* POINTER_REGS */ \ @@ -446,7 +443,7 @@ enum reg_class #define REGNO_REG_CLASS(REGNO) aarch64_regno_regclass (REGNO) -#define INDEX_REG_CLASS CORE_REGS +#define INDEX_REG_CLASS GENERAL_REGS #define BASE_REG_CLASS POINTER_REGS /* Register pairs used to eliminate unneeded registers that point into |