diff options
| author | Kewen Lin <linkw@linux.ibm.com> | 2021-10-13 00:20:45 -0500 |
|---|---|---|
| committer | Kewen Lin <linkw@linux.ibm.com> | 2021-10-13 00:20:45 -0500 |
| commit | a124c1b0a2595f285c0d8ed863b37b83e14a6566 (patch) | |
| tree | 25a5e8d87c3be2918fb3c1c668f83ee8c748095f | |
| parent | 52055987fba37d1eb3b3ed34063a07c2e912538e (diff) | |
| download | gcc-a124c1b0a2595f285c0d8ed863b37b83e14a6566.zip gcc-a124c1b0a2595f285c0d8ed863b37b83e14a6566.tar.gz gcc-a124c1b0a2595f285c0d8ed863b37b83e14a6566.tar.bz2 | |
rs6000/test: Adjust test cases due to O2 vect [PR102658]
Commit r12-4240 enables vectorization at O2, this patch is to
adjust some test cases for rs6000 port accordingly.
It simply adds -fno-tree-vectorize to retain original test points.
gcc/testsuite/ChangeLog:
PR testsuite/102658
* gcc.target/powerpc/dform-1.c: Adjust as vectorization enabled at O2.
* gcc.target/powerpc/dform-2.c: Likewise.
* gcc.target/powerpc/pr80510-2.c: Likewise.
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/dform-1.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/dform-2.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr80510-2.c | 4 |
3 files changed, 9 insertions, 3 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/dform-1.c b/gcc/testsuite/gcc.target/powerpc/dform-1.c index fac3923..1a0b0cf 100644 --- a/gcc/testsuite/gcc.target/powerpc/dform-1.c +++ b/gcc/testsuite/gcc.target/powerpc/dform-1.c @@ -1,6 +1,8 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-options "-mpower9-vector -O2" } */ +/* Now O2 enables vectorization by default, which makes expected scalar + loads gone, so simply disable it. */ +/* { dg-options "-mpower9-vector -O2 -fno-tree-vectorize" } */ #ifndef TYPE #define TYPE double diff --git a/gcc/testsuite/gcc.target/powerpc/dform-2.c b/gcc/testsuite/gcc.target/powerpc/dform-2.c index 9947330..cc91f55 100644 --- a/gcc/testsuite/gcc.target/powerpc/dform-2.c +++ b/gcc/testsuite/gcc.target/powerpc/dform-2.c @@ -1,6 +1,8 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-options "-mpower9-vector -O2" } */ +/* Now O2 enables vectorization by default, which generates unexpected float + conversion for vector construction, so simply disable it. */ +/* { dg-options "-mpower9-vector -O2 -fno-tree-vectorize" } */ #ifndef TYPE #define TYPE float diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c index f85e005..d041d96 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c @@ -1,7 +1,9 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-options "-mdejagnu-cpu=power8 -O2" } */ +/* Now O2 enables vectorization by default, which generates unexpected VSR + to GPR movement for vector construction, so simply disable it. */ +/* { dg-options "-mdejagnu-cpu=power8 -O2 -fno-tree-vectorize" } */ /* Make sure that STXSSPX is generated for float scalars in Altivec registers on power7 instead of moving the value to a FPR register and doing a X-FORM |