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| author | H.J. Lu <hongjiu.lu@intel.com> | 2011-05-30 20:00:11 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2011-05-30 13:00:11 -0700 |
| commit | a0cd843f4d76e778d03509bd3aa80a3880ab717f (patch) | |
| tree | 15a8e619c63ac1d8dc5884be4164334b6bc4abdf | |
| parent | 006a5f38b96928094f8e359a29a6415cdef1b29f (diff) | |
| download | gcc-a0cd843f4d76e778d03509bd3aa80a3880ab717f.zip gcc-a0cd843f4d76e778d03509bd3aa80a3880ab717f.tar.gz gcc-a0cd843f4d76e778d03509bd3aa80a3880ab717f.tar.bz2 | |
Handle misaligned TFmode load/store.
gcc/
2011-05-30 H.J. Lu <hongjiu.lu@intel.com>
PR target/49168
* config/i386/i386.md (*movtf_internal): Handle misaligned
load/store.
gcc/testsuite/
2011-05-30 H.J. Lu <hongjiu.lu@intel.com>
PR target/49168
* gcc.target/i386/pr49168-1.c: New.
From-SVN: r174451
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 19 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr49168-1.c | 11 |
4 files changed, 38 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5e9badf..45212c0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-05-30 H.J. Lu <hongjiu.lu@intel.com> + + PR target/49168 + * config/i386/i386.md (*movtf_internal): Handle misaligned + load/store. + 2011-05-30 Jakub Jelinek <jakub@redhat.com> * dwarf2out.c (modified_type_die, gen_reference_type_die): Use diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 89e1173..6d3ae80 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2842,10 +2842,23 @@ { case 0: case 1: - if (get_attr_mode (insn) == MODE_V4SF) - return "%vmovaps\t{%1, %0|%0, %1}"; + /* Handle misaligned load/store since we don't have movmisaligntf + pattern. */ + if (misaligned_operand (operands[0], TFmode) + || misaligned_operand (operands[1], TFmode)) + { + if (get_attr_mode (insn) == MODE_V4SF) + return "%vmovups\t{%1, %0|%0, %1}"; + else + return "%vmovdqu\t{%1, %0|%0, %1}"; + } else - return "%vmovdqa\t{%1, %0|%0, %1}"; + { + if (get_attr_mode (insn) == MODE_V4SF) + return "%vmovaps\t{%1, %0|%0, %1}"; + else + return "%vmovdqa\t{%1, %0|%0, %1}"; + } case 2: return standard_sse_constant_opcode (insn, operands[1]); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e80c1b2..d8b0ef5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-05-30 H.J. Lu <hongjiu.lu@intel.com> + + PR target/49168 + * gcc.target/i386/pr49168-1.c: New. + 2011-05-30 Jakub Jelinek <jakub@redhat.com> Eric Botcazou <ebotcazou@adacore.com> diff --git a/gcc/testsuite/gcc.target/i386/pr49168-1.c b/gcc/testsuite/gcc.target/i386/pr49168-1.c new file mode 100644 index 0000000..9676dc8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr49168-1.c @@ -0,0 +1,11 @@ +/* PR target/49168 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mtune=generic" } */ +/* { dg-final { scan-assembler-not "movdqa\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */ +/* { dg-final { scan-assembler "movdqu\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */ + +void +flt128_va (void *mem, __float128 d) +{ + __builtin_memcpy (mem, &d, sizeof (d)); +} |