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| author | J"orn Rennecke <joern.rennecke@superh.com> | 2002-12-11 20:16:27 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2002-12-11 20:16:27 +0000 |
| commit | 9a4816af1e99c66823fe71c67f60fe3b7f61b37d (patch) | |
| tree | 2777771aac54452a63d7ee9d501f3f5605f81fad | |
| parent | f69bc49776f95f4cef791f96884739c319058278 (diff) | |
| download | gcc-9a4816af1e99c66823fe71c67f60fe3b7f61b37d.zip gcc-9a4816af1e99c66823fe71c67f60fe3b7f61b37d.tar.gz gcc-9a4816af1e99c66823fe71c67f60fe3b7f61b37d.tar.bz2 | |
sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS if not TARGET_SHMEDIA.
* sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS
if not TARGET_SHMEDIA.
From-SVN: r60045
| -rw-r--r-- | gcc/ChangeLog | 16 | ||||
| -rw-r--r-- | gcc/config/sh/sh.h | 41 |
2 files changed, 24 insertions, 33 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09e2549..f2f70b0a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +Wed Dec 11 20:15:19 2002 J"orn Rennecke <joern.rennecke@superh.com> + + * sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS + if not TARGET_SHMEDIA. + +Wed Dec 11 19:05:05 2002 J"orn Rennecke <joern.rennecke@superh.com> + + * sh.h (REG_CLASS_HAS_FP_REG): New. + (REGISTER_MOVE_COST) Use it. Put body into a function and + move it into: + * sh.c (sh_register_move_cost). + * sh-protos.h (sh_register_move_cost): Declare. + + * sh.c (sh_expand_builtin): Abort for unexpected nop values. + (sh_adjust_cost): Always return a value. + Wed Dec 11 18:39:52 2002 J"orn Rennecke <joern.rennecke@superh.com> * sh.h (REG_CLASS_HAS_GENERAL_REG): New. diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 52f72a1..0d08690 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -2812,42 +2812,17 @@ while (0) it uses this information. Hence, the general register <-> floating point register information here is not used for SFmode. */ -#define REGCLASS_HAS_GENERAL_REG(rclass) \ -((rclass)==GENERAL_REGS||(rclass)==R0_REGS||(rclass)==SIBCALL_REGS) +#define REGCLASS_HAS_GENERAL_REG(CLASS) \ + ((CLASS) == GENERAL_REGS || (CLASS) == R0_REGS \ + || (! TARGET_SHMEDIA && (CLASS) == SIBCALL_REGS)) /* NB SIBCALL_REGS are not strictly general, as they include TR0-TR4 */ +#define REGCLASS_HAS_FP_REG(CLASS) \ + ((CLASS) == FP0_REGS || (CLASS) == FP_REGS \ + || (CLASS) == DF_REGS || (CLASS) == DF_HI_REGS) + #define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) \ - (((((DSTCLASS) == T_REGS) || ((DSTCLASS) == PR_REGS)) ? 10 \ - : ((((DSTCLASS) == FP0_REGS || (DSTCLASS) == FP_REGS \ - || (DSTCLASS) == DF_REGS || (DSTCLASS) == DF_HI_REGS) \ - && REGCLASS_HAS_GENERAL_REG (SRCCLASS)) \ - || (REGCLASS_HAS_GENERAL_REG (DSTCLASS) \ - && ((SRCCLASS) == FP0_REGS || (SRCCLASS) == FP_REGS \ - || (SRCCLASS) == DF_REGS || (SRCCLASS) == DF_HI_REGS))) \ - ? (TARGET_SHMEDIA ? 4 \ - : TARGET_FMOVD ? 8 : 12) \ - : (((DSTCLASS) == FPUL_REGS \ - && REGCLASS_HAS_GENERAL_REG (SRCCLASS)) \ - || ((SRCCLASS) == FPUL_REGS \ - && REGCLASS_HAS_GENERAL_REG (DSTCLASS))) \ - ? 5 \ - : (((DSTCLASS) == FPUL_REGS \ - && ((SRCCLASS) == PR_REGS || (SRCCLASS) == MAC_REGS \ - || (SRCCLASS) == T_REGS)) \ - || ((SRCCLASS) == FPUL_REGS \ - && ((DSTCLASS) == PR_REGS || (DSTCLASS) == MAC_REGS))) \ - ? 7 \ - : (((SRCCLASS) == TARGET_REGS \ - && ! REGCLASS_HAS_GENERAL_REG (DSTCLASS)) \ - || ((DSTCLASS) == TARGET_REGS \ - && ! REGCLASS_HAS_GENERAL_REG (SRCCLASS))) \ - ? 20 \ - : (((SRCCLASS) == FPSCR_REGS \ - && ! REGCLASS_HAS_GENERAL_REG (DSTCLASS)) \ - || ((DSTCLASS) == FPSCR_REGS \ - && ! REGCLASS_HAS_GENERAL_REG (SRCCLASS))) \ - ? 4 \ - : 2) * ((MODE) == V16SFmode ? 8 : (MODE) == V4SFmode ? 2 : 1)) + sh_register_move_cost ((MODE), (SRCCLASS), (DSTCLASS)) /* ??? Perhaps make MEMORY_MOVE_COST depend on compiler option? This would be so that people with slow memory systems could generate |