aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRainer Orth <ro@TechFak.Uni-Bielefeld.DE>2003-06-17 20:50:41 +0000
committerRainer Orth <ro@gcc.gnu.org>2003-06-17 20:50:41 +0000
commit94b2a23bc85cab80bc9db753e3f082ae2df550f2 (patch)
tree0bb64c61a9cf4a6148832a6a71c8fbc88326bf6d
parent1f11df32c1d1207929ba8c6a75c204d0dd1d7bfa (diff)
downloadgcc-94b2a23bc85cab80bc9db753e3f082ae2df550f2.zip
gcc-94b2a23bc85cab80bc9db753e3f082ae2df550f2.tar.gz
gcc-94b2a23bc85cab80bc9db753e3f082ae2df550f2.tar.bz2
* config/mips/mips.md (trap): Use break 0 when !TARGET_GAS.
From-SVN: r68112
-rw-r--r--gcc/ChangeLog2
-rw-r--r--gcc/config/mips/mips.md3
2 files changed, 4 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b673b42..f2474ac 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,7 @@
2003-06-17 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+ * config/mips/mips.md (trap): Use break 0 when !TARGET_GAS.
+
* config/mips/iris6-o32.h (MIPS_ISA_DEFAULT): Remove.
(MIPS_CPU_STRING_DEFAULT): Redefine to mips2.
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b26960a..2841369 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -640,7 +640,8 @@
{
if (ISA_HAS_COND_TRAP)
return \"teq\\t$0,$0\";
- else if (TARGET_MIPS16)
+ /* The IRIX 6 O32 assembler requires the first break operand. */
+ else if (TARGET_MIPS16 || ! TARGET_GAS)
return \"break 0\";
else
return \"break\";