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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2019-07-29 15:31:53 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2019-07-29 15:31:53 +0000
commit937337890108676b3588d77bd704927d349db71b (patch)
tree2f20f6b47231e0a3aa85bbab5f8f45f98aa22482
parent50c2df93a6a450228b75901fad7e20cd2e7a8ee7 (diff)
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[arm] Make ACLE builtins use arm_* namespace for expanders
The builtins from <arm_acle.h> use fairly general expander names such as "crc", "mcr" etc. These run the risk of being reserved by the midend in the future. Let's namespace them to arm_* as is convention. * config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to CODE_FOR_arm_##. * config/arm/arm.md (<crc_variant>): Rename to... (arm_<crc_variant>): ... This. (<cdp>): Rename to... (arm_<cdp>): ... This. (<ldc>): Rename to... (arm_<ldc>): ... This. (<stc>): Rename to... (arm_<stc>): ... This. (<mcr>): Rename to... (arm_<mcr>): ... This. (<mrc>): Rename to... (arm_<mrc>): ... This. (<mcrr>): Rename to... (arm_<mcrr>): ... This. (<mrrc>): Rename to... (arm_<mrrc>): ... This. From-SVN: r273879
-rw-r--r--gcc/ChangeLog21
-rw-r--r--gcc/config/arm/arm-builtins.c2
-rw-r--r--gcc/config/arm/arm.md16
3 files changed, 30 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7bdb466..2d981f6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2019-07-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
+ CODE_FOR_arm_##.
+ * config/arm/arm.md (<crc_variant>): Rename to...
+ (arm_<crc_variant>): ... This.
+ (<cdp>): Rename to...
+ (arm_<cdp>): ... This.
+ (<ldc>): Rename to...
+ (arm_<ldc>): ... This.
+ (<stc>): Rename to...
+ (arm_<stc>): ... This.
+ (<mcr>): Rename to...
+ (arm_<mcr>): ... This.
+ (<mrc>): Rename to...
+ (arm_<mrc>): ... This.
+ (<mcrr>): Rename to...
+ (arm_<mcrr>): ... This.
+ (<mrrc>): Rename to...
+ (arm_<mrrc>): ... This.
+
2019-07-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/91257
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 8f2c937..07da55e 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -376,7 +376,7 @@ static arm_builtin_datum neon_builtin_data[] =
#undef CF
#undef VAR1
#define VAR1(T, N, A) \
- {#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS},
+ {#N, UP (A), CODE_FOR_arm_##N, 0, T##_QUALIFIERS},
static arm_builtin_datum acle_builtin_data[] =
{
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 7ab939a..ccc48a5 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12062,7 +12062,7 @@
(set_attr "predicable" "yes")])
;; ARMv8 CRC32 instructions.
-(define_insn "<crc_variant>"
+(define_insn "arm_<crc_variant>"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "s_register_operand" "r")
(match_operand:<crc_mode> 2 "s_register_operand" "r")]
@@ -12178,7 +12178,7 @@
DONE;
})
-(define_insn "<cdp>"
+(define_insn "arm_<cdp>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n")
@@ -12224,19 +12224,19 @@
[(set_attr "length" "4")
(set_attr "type" "coproc")])
-(define_expand "<ldc>"
+(define_expand "arm_<ldc>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand")
(match_operand:SI 1 "immediate_operand")
(mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)]
"arm_coproc_builtin_available (VUNSPEC_<LDC>)")
-(define_expand "<stc>"
+(define_expand "arm_<stc>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand")
(match_operand:SI 1 "immediate_operand")
(mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)]
"arm_coproc_builtin_available (VUNSPEC_<STC>)")
-(define_insn "<mcr>"
+(define_insn "arm_<mcr>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "s_register_operand" "r")
@@ -12256,7 +12256,7 @@
[(set_attr "length" "4")
(set_attr "type" "coproc")])
-(define_insn "<mrc>"
+(define_insn "arm_<mrc>"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n")
@@ -12275,7 +12275,7 @@
[(set_attr "length" "4")
(set_attr "type" "coproc")])
-(define_insn "<mcrr>"
+(define_insn "arm_<mcrr>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n")
(match_operand:DI 2 "s_register_operand" "r")
@@ -12291,7 +12291,7 @@
[(set_attr "length" "4")
(set_attr "type" "coproc")])
-(define_insn "<mrrc>"
+(define_insn "arm_<mrrc>"
[(set (match_operand:DI 0 "s_register_operand" "=r")
(unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n")