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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2008-07-02 15:38:44 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@gcc.gnu.org> | 2008-07-02 15:38:44 +0000 |
| commit | 906c5773db6775e8182c4ff74f5c835bca66ae4e (patch) | |
| tree | bfbe169105ea00307c66ce38818cfba39e9a9f3b | |
| parent | 8f9ddf6acff067428b2312626c50caf9956978b1 (diff) | |
| download | gcc-906c5773db6775e8182c4ff74f5c835bca66ae4e.zip gcc-906c5773db6775e8182c4ff74f5c835bca66ae4e.tar.gz gcc-906c5773db6775e8182c4ff74f5c835bca66ae4e.tar.bz2 | |
20030222-1.x: New file.
* gcc.c-torture/execute/20030222-1.x: New file.
* gcc.dg/tree-ssa/ssa-fre-3.c: Disable test on SPU.
* gcc.dg/lower-subreg-1.c: Likewise.
From-SVN: r137360
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.c-torture/execute/20030222-1.x | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/lower-subreg-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c | 2 |
4 files changed, 14 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e8175a1..8a51dc0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,11 @@ 2008-07-02 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + * gcc.c-torture/execute/20030222-1.x: New file. + * gcc.dg/tree-ssa/ssa-fre-3.c: Disable test on SPU. + * gcc.dg/lower-subreg-1.c: Likewise. + +2008-07-02 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + SPU single-precision FP does not support subnormals: * gcc.c-torture/execute/ieee/mul-subnormal-single-1.x: New file. diff --git a/gcc/testsuite/gcc.c-torture/execute/20030222-1.x b/gcc/testsuite/gcc.c-torture/execute/20030222-1.x new file mode 100644 index 0000000..e195563 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/20030222-1.x @@ -0,0 +1,6 @@ +if [istarget "spu-*-*"] { + # Using inline assembly to convert long long to int is not working quite + # right # on the SPU. An extra shift-left-4-byte is needed. + return 1 +} +return 0 diff --git a/gcc/testsuite/gcc.dg/lower-subreg-1.c b/gcc/testsuite/gcc.dg/lower-subreg-1.c index 0185126..bb35d21 100644 --- a/gcc/testsuite/gcc.dg/lower-subreg-1.c +++ b/gcc/testsuite/gcc.dg/lower-subreg-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { { ! mips64 } && { ! ia64-*-* } } } } */ +/* { dg-do compile { target { { { ! mips64 } && { ! ia64-*-* } } && { ! spu-*-* } } } } */ /* { dg-options "-O -fdump-rtl-subreg" } */ /* { dg-require-effective-target ilp32 } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c index 3b7a547..85e4448 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c @@ -5,7 +5,7 @@ When the condition is true, we distribute "(int) (a + b)" as "(int) a + (int) b", otherwise we keep the original. */ -/* { dg-do compile { target { ! mips64 } } } */ +/* { dg-do compile { target { { ! mips64 } && { ! spu-*-* } } } } */ /* { dg-options "-O -fwrapv -fdump-tree-fre-details" } */ /* From PR14844. */ |