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authorStan Cox <scox@cygnus.com>1999-09-23 01:03:13 +0000
committerStan Cox <scox@gcc.gnu.org>1999-09-23 01:03:13 +0000
commit8da665d583ad51bbba86a5e135dfc33d4b764455 (patch)
treefe8507a33bd2c739d2aa1c9a1223244ba551d964
parentf38b27c7cb8392960f06b54303830e51704f8c6e (diff)
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mips.h (GO_IF_LEGITIMATE_ADDRESS): Don't accept large register offsets; let LEGITIMIZE_ADDRESS load it into a register.
* mips.h (GO_IF_LEGITIMATE_ADDRESS): Don't accept large register offsets; let LEGITIMIZE_ADDRESS load it into a register. (LEGITIMIZE_ADDRESS): Use plus_constant to avoid (plus (reg) (const_int 0)) * mips.md (call_internal3c): New pattern for -mips16 -mlong-calls. From-SVN: r29608
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/mips/mips.h4
-rw-r--r--gcc/config/mips/mips.md17
3 files changed, 25 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbccd91..a381ea8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Wed Sep 22 17:58:01 1999 Stan Cox <scox@cygnus.com>
+
+ * mips.h (GO_IF_LEGITIMATE_ADDRESS): Don't accept large
+ register offsets; let LEGITIMIZE_ADDRESS load it into a register.
+ (LEGITIMIZE_ADDRESS): Use plus_constant to avoid
+ (plus (reg) (const_int 0))
+ * mips.md (call_internal3c): New pattern for -mips16 -mlong-calls.
+
Wed Sep 22 17:55:31 1999 David Edelsohn <edelsohn@gnu.org>
* rs6000.c (expand_block_move): DImode loads and stores require
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 59476db..61a1dfe 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2966,6 +2966,7 @@ extern struct rtx_def *mips_va_arg ();
&& (!TARGET_EMBEDDED_PIC \
|| code1 != CONST \
|| GET_CODE (XEXP (xplus1, 0)) != MINUS) \
+ && ! (code1 == CONST_INT && ! SMALL_INT (xplus1)) \
&& !TARGET_MIPS16) \
goto ADDR; \
} \
@@ -3125,8 +3126,7 @@ extern struct rtx_def *mips_va_arg ();
ptr_reg, \
gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
\
- X = gen_rtx_PLUS (Pmode, ptr_reg, \
- GEN_INT (INTVAL (xplus1) & 0x7fff)); \
+ X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff); \
goto WIN; \
} \
} \
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 4b52cd2..d6e533b 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -9591,7 +9591,8 @@ move\\t%0,%z4\\n\\
[(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!TARGET_MIPS16
+ && !(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
"%*jal\\t%2,%0"
[(set_attr "type" "call")
(set_attr "mode" "none")])
@@ -9600,7 +9601,19 @@ move\\t%0,%z4\\n\\
[(call (mem:DI (match_operand:DI 0 "se_register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
- "Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "!TARGET_MIPS16
+ && Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
+ "%*jal\\t%2,%0"
+ [(set_attr "type" "call")
+ (set_attr "mode" "none")
+ (set_attr "length" "1")])
+
+(define_insn "call_internal3c"
+ [(call (mem:SI (match_operand:SI 0 "register_operand" "e"))
+ (match_operand 1 "" "i"))
+ (clobber (match_operand:SI 2 "register_operand" "=y"))]
+ "TARGET_MIPS16 && !(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS
+ && GET_CODE (operands[2]) == REG && REGNO (operands[2]) == 31"
"%*jal\\t%2,%0"
[(set_attr "type" "call")
(set_attr "mode" "none")])