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authorRichard Kenner <kenner@gcc.gnu.org>1994-05-05 14:37:00 -0400
committerRichard Kenner <kenner@gcc.gnu.org>1994-05-05 14:37:00 -0400
commit87e3e0c1b502d3cbb316cd32745eb1fc4542a540 (patch)
treed3253a207d9e3b252e59fd090297a29b8aef3417
parent83a24b1d0d7894b76f1ad1e31dd149f2c6a79baf (diff)
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(simplify_rtx, case SUBREG): Don't call force_to_mode.
(simplify_set): Call force_to_mode here. From-SVN: r7216
-rw-r--r--gcc/combine.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/gcc/combine.c b/gcc/combine.c
index 41c83dc..3201096 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -3260,16 +3260,10 @@ simplify_rtx (x, op0_mode, last, in_dest)
&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (op0_mode))
return SUBREG_REG (x);
- /* If we are narrowing an integral object, we need to see if we can
- simplify the expression for the object knowing that we only need the
- low-order bits. */
+ /* Note that we cannot do any narrowing for non-constants since
+ we might have been counting on using the fact that some bits were
+ zero. We now do this in the SET. */
- if (GET_MODE_CLASS (mode) == MODE_INT
- && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
- && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
- && subreg_lowpart_p (x))
- return force_to_mode (SUBREG_REG (x), mode, GET_MODE_MASK (mode),
- NULL_RTX, 0);
break;
case NOT:
@@ -4201,6 +4195,13 @@ simplify_set (x)
if (GET_CODE (dest) == PC && GET_CODE (src) == RETURN)
return src;
+ /* Now that we know for sure which bits of SRC we are using, see if we can
+ simplify the expression for the object knowing that we only need the
+ low-order bits. */
+
+ if (GET_MODE_CLASS (mode) == MODE_INT)
+ src = force_to_mode (src, mode, GET_MODE_MASK (mode), NULL_RTX, 0);
+
/* Convert this into a field assignment operation, if possible. */
x = make_field_assignment (x);