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| author | Walter Lee <walt@tilera.com> | 2017-02-03 18:41:57 +0000 |
|---|---|---|
| committer | Walter Lee <walt@gcc.gnu.org> | 2017-02-03 18:41:57 +0000 |
| commit | 86010a086b6ae8f1b129b6e992ed2ce2a36e38e3 (patch) | |
| tree | ee31af49185c9ceec99bcc3ee41eddd3a7825aef | |
| parent | d9327911bfb074734d2293c9ff0698b1197b0563 (diff) | |
| download | gcc-86010a086b6ae8f1b129b6e992ed2ce2a36e38e3.zip gcc-86010a086b6ae8f1b129b6e992ed2ce2a36e38e3.tar.gz gcc-86010a086b6ae8f1b129b6e992ed2ce2a36e38e3.tar.bz2 | |
re PR target/78862 (tile*: ICE with -fstack-protetor-strong)
PR target/78862
* config/tilegx/tilegx.md (tilegx_expand_prologue): Add blockage
after initial stackframe link reg save.
* config/tilepro/tilepro.md (tilepro_expand_prologue): Likewise.
From-SVN: r245159
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/tilegx/tilegx.c | 7 | ||||
| -rw-r--r-- | gcc/config/tilepro/tilepro.c | 7 |
3 files changed, 17 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a1db127..733a325 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-02-03 Walter Lee <walt@tilera.com> + + PR target/78862 + * config/tilegx/tilegx.md (tilegx_expand_prologue): Add blockage + after initial stackframe link reg save. + * config/tilepro/tilepro.md (tilepro_expand_prologue): Likewise. + 2017-02-03 Jakub Jelinek <jakub@redhat.com> PR target/79354 diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c index b04e708..d8ca14b 100644 --- a/gcc/config/tilegx/tilegx.c +++ b/gcc/config/tilegx/tilegx.c @@ -3998,8 +3998,11 @@ tilegx_expand_prologue (void) /* Save lr first in its special location because code after this might use the link register as a scratch register. */ if (df_regs_ever_live_p (TILEGX_LINK_REGNUM) || crtl->calls_eh_return) - FRP (frame_emit_store (TILEGX_LINK_REGNUM, TILEGX_LINK_REGNUM, - stack_pointer_rtx, stack_pointer_rtx, 0)); + { + FRP (frame_emit_store (TILEGX_LINK_REGNUM, TILEGX_LINK_REGNUM, + stack_pointer_rtx, stack_pointer_rtx, 0)); + emit_insn (gen_blockage ()); + } if (total_size == 0) { diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c index b16ad38..aa1bb1c 100644 --- a/gcc/config/tilepro/tilepro.c +++ b/gcc/config/tilepro/tilepro.c @@ -3533,8 +3533,11 @@ tilepro_expand_prologue (void) /* Save lr first in its special location because code after this might use the link register as a scratch register. */ if (df_regs_ever_live_p (TILEPRO_LINK_REGNUM) || crtl->calls_eh_return) - FRP (frame_emit_store (TILEPRO_LINK_REGNUM, TILEPRO_LINK_REGNUM, - stack_pointer_rtx, stack_pointer_rtx, 0)); + { + FRP (frame_emit_store (TILEPRO_LINK_REGNUM, TILEPRO_LINK_REGNUM, + stack_pointer_rtx, stack_pointer_rtx, 0)); + emit_insn (gen_blockage ()); + } if (total_size == 0) { |