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| author | Joern Rennecke <joern.rennecke@embecosm.com> | 2012-03-01 23:40:57 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2012-03-01 23:40:57 +0000 |
| commit | 82b0658991eb635204f3e25dcac2c29ebf3032fa (patch) | |
| tree | da6668c076847f27c0accefdf9dce2f4d52c9739 | |
| parent | 08b03910db6745fed195d7a4562cd330441b1f5b (diff) | |
| download | gcc-82b0658991eb635204f3e25dcac2c29ebf3032fa.zip gcc-82b0658991eb635204f3e25dcac2c29ebf3032fa.tar.gz gcc-82b0658991eb635204f3e25dcac2c29ebf3032fa.tar.bz2 | |
* config/epiphany/epiphany.md (movmisalign<mode>): New patterns.
From-SVN: r184766
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/epiphany/epiphany.md | 20 |
2 files changed, 23 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8da0464..751ca2b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2012-03-01 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.md (movmisalign<mode>): New patterns. + 2012-03-01 Jeremy Bennett <jeremy.bennett@embecosm.com> Joern Rennecke <joern.rennecke@embecosm.com> diff --git a/gcc/config/epiphany/epiphany.md b/gcc/config/epiphany/epiphany.md index 7f8f2a9..b192153 100644 --- a/gcc/config/epiphany/epiphany.md +++ b/gcc/config/epiphany/epiphany.md @@ -1,6 +1,6 @@ ;; Machine description of the Adaptiva epiphany cpu for GNU C compiler ;; Copyright (C) 1994, 1997, 1998, 1999, 2000, 2004, 2005, 2007, 2009, 2010, -;; 2011 Free Software Foundation, Inc. +;; 2011, 2012 Free Software Foundation, Inc. ;; Contributed by Embecosm on behalf of Adapteva, Inc. ;; This file is part of GCC. @@ -2439,6 +2439,24 @@ emit_move_insn (operands[0], operands[1]); DONE; }) + +(define_expand "movmisalign<mode>" + [(set (match_operand:DWV2MODE 0 "nonimmediate_operand" "") + (match_operand:DWV2MODE 1 "general_operand" ""))] + "" +{ + rtx op00, op01, op10, op11; + + op00 = simplify_gen_subreg (<vmode_PART>mode, operands[0], <MODE>mode, 0); + op01 = simplify_gen_subreg (<vmode_PART>mode, operands[0], <MODE>mode, + UNITS_PER_WORD); + op10 = simplify_gen_subreg (<vmode_PART>mode, operands[1], <MODE>mode, 0); + op11 = simplify_gen_subreg (<vmode_PART>mode, operands[1], <MODE>mode, + UNITS_PER_WORD); + emit_move_insn (op00, op10); + emit_move_insn (op01, op11); + DONE; +}) (define_insn "nop" [(const_int 0)] |