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| author | Virendra Pathak <virendra.pathak@broadcom.com> | 2016-06-21 13:43:29 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2016-06-21 13:43:29 +0000 |
| commit | 717b373c0b57fa004cefe3d8545c2512ee2b3d3e (patch) | |
| tree | ff3ce4484ac501b65b32226d7cb2438e938328c7 | |
| parent | 316ded5382f62820e2babaaf1c8a1448edd4d13c (diff) | |
| download | gcc-717b373c0b57fa004cefe3d8545c2512ee2b3d3e.zip gcc-717b373c0b57fa004cefe3d8545c2512ee2b3d3e.tar.gz gcc-717b373c0b57fa004cefe3d8545c2512ee2b3d3e.tar.bz2 | |
[PATCH/AARCH64] Accept vulcan as a cpu name for the AArch64 port of GCC
gcc/ChangeLog
* config/aarch64/aarch64-cores.def (vulcan): New core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document vulcan as an available option.
From-SVN: r237645
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 4 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-tune.md | 2 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
4 files changed, 13 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 954ca4b..9069308 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-06-21 Virendra Pathak <virendra.pathak@broadcom.com> + + * config/aarch64/aarch64-cores.def (vulcan): New core. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi: Document vulcan as an available option. + 2016-06-21 Eric Botcazou <ebotcazou@adacore.com> * cse.c (canon_asm_operands): New function extracted from... diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 251a3eb..ced8f94 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -49,6 +49,10 @@ AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AA AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1") AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000") +/* V8.1 Architecture Processors. */ + +AARCH64_CORE("vulcan", vulcan, cortexa57, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, cortexa57, "0x42", "0x516") + /* V8 big.LITTLE implementations. */ AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03") diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index cbc6f48..8c4a0e9 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53" + "cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,vulcan,cortexa57cortexa53,cortexa72cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e000218..4ff0ad5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13097,8 +13097,8 @@ Specify the name of the target processor for which GCC should tune the performance of the code. Permissible values for this option are: @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx}, -@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, -@samp{native}. +@samp{xgene1}, @samp{vulcan}, @samp{cortex-a57.cortex-a53}, +@samp{cortex-a72.cortex-a53}, @samp{native}. The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53} specify that GCC should tune for a big.LITTLE system. |