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| author | Jeff Law <law@gcc.gnu.org> | 1993-01-21 09:34:04 -0700 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1993-01-21 09:34:04 -0700 |
| commit | 5a6cbc3795e29d2056db40339460ef7915daed1b (patch) | |
| tree | b2ac86fd7a6535e21d20502e67db827ccaea7cab | |
| parent | 08a7baacfb9fbade86a4787fe00c4657e1b9cc44 (diff) | |
| download | gcc-5a6cbc3795e29d2056db40339460ef7915daed1b.zip gcc-5a6cbc3795e29d2056db40339460ef7915daed1b.tar.gz gcc-5a6cbc3795e29d2056db40339460ef7915daed1b.tar.bz2 | |
pa.h (REG_CLASSES): Delete GENERAL_OR_FP_OR_SNAKE_FP register class, it's not needed anymore.
* pa.h (REG_CLASSES): Delete GENERAL_OR_FP_OR_SNAKE_FP register
class, it's not needed anymore. Delete all references. 'Z'
register class is now "ALL_REGS".
From-SVN: r3297
| -rw-r--r-- | gcc/config/pa/pa.h | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 2abcff2..444214f 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -504,15 +504,11 @@ extern int leaf_function; fmpyadd and fmpysub are restricted. FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used - anywhere else. - - GENERAL_OR_FP_OR_SNAKE_FP_REGS is for reload_{in,out}si only and - isn't used anywhereelse. */ + anywhere else. */ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS, - FP_OR_SNAKE_FP_REGS, GENERAL_OR_FP_OR_SNAKE_FP_REGS, SHIFT_REGS, - ALL_REGS, LIM_REG_CLASSES}; + FP_OR_SNAKE_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES}; #define N_REG_CLASSES (int) LIM_REG_CLASSES @@ -521,8 +517,7 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, #define REG_CLASS_NAMES \ { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\ "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\ - "FP_OR_SNAKE_FP_REGS", "GENERAL_OR_FP_OR_SNAKE_FP_REGS", "SHIFT_REGS",\ - "ALL_REGS"} + "FP_OR_SNAKE_FP_REGS", "SHIFT_REGS", "ALL_REGS"} /* Define which registers fit in which classes. This is an initializer for a vector of HARD_REG_SET @@ -539,7 +534,6 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, {0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \ {-2, 0xffff0000, ~0, 0xffff}, /* GENERAL_OR_SNAKE_FP_REGS */\ {0, ~0, ~0, 0xffff}, /* FP_OR_SNAKE_FP_REGS */\ - {-2, ~0, ~0, 0xffff}, /* GENERAL_OR_FP_OR_SNAKE_FP_REGS */\ {0, 0, 0, 0x10000}, /* SHIFT_REGS */ \ {-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */ @@ -564,7 +558,9 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, #define FP_REG_CLASS_P(CLASS) \ (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS) -/* Get reg_class from a letter such as appears in the machine description. */ +/* Get reg_class from a letter such as appears in the machine description. + Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of + GENERAL_REGS. */ #define REG_CLASS_FROM_LETTER(C) \ ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \ @@ -573,7 +569,7 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, ((C) == 'q' ? SHIFT_REGS : \ ((C) == 'a' ? R1_REGS : \ ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \ - ((C) == 'Z' ? GENERAL_OR_FP_OR_SNAKE_FP_REGS : NO_REGS))))))) + ((C) == 'Z' ? ALL_REGS : NO_REGS))))))) /* The letters I, J, K, L and M in a register constraint string can be used to stand for particular ranges of immediate operands. |