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| author | Sergey Shalnov <Sergey.Shalnov@intel.com> | 2017-11-17 04:56:57 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2017-11-17 04:56:57 +0000 |
| commit | 5958557b750254f28954d1ed6a3ce0b9cb48c6fb (patch) | |
| tree | f31b71081b8a9db0d80b7c10ba39e9a608d2f990 | |
| parent | 71d8eff176ca829b984228e522238937cb267c05 (diff) | |
| download | gcc-5958557b750254f28954d1ed6a3ce0b9cb48c6fb.zip gcc-5958557b750254f28954d1ed6a3ce0b9cb48c6fb.tar.gz gcc-5958557b750254f28954d1ed6a3ce0b9cb48c6fb.tar.bz2 | |
Enable option -mprefer-avx256 as default for Intel Skylake configuration
gcc/
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add tuning
option prefer-avx256 for skylake-avx512 configuration.
* config/i386/i386.c (ix86_option_override_internal): Ditto.
(get_builtin_code_for_version): Ditto.
From-SVN: r254855
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 8 | ||||
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 4 |
3 files changed, 18 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 115a662..da8a9ce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-11-17 Sergey Shalnov <Sergey.Shalnov@intel.com> + + * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add tuning + option prefer-avx256 for skylake-avx512 configuration. + * config/i386/i386.c (ix86_option_override_internal): Ditto. + (get_builtin_code_for_version): Ditto. + 2017-11-17 Chung-Ju Wu <jasonwucj@gmail.com> Monk Chiang <sh.chiang04@gmail.com> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index b2c2934..c9580ba 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3518,7 +3518,7 @@ ix86_option_override_internal (bool main_args_p, {"core-avx2", PROCESSOR_HASWELL, CPU_HASWELL, PTA_HASWELL}, {"broadwell", PROCESSOR_HASWELL, CPU_HASWELL, PTA_BROADWELL}, {"skylake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE}, - {"skylake-avx512", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE_AVX512}, + {"skylake-avx512", PROCESSOR_SKYLAKE_AVX512, CPU_HASWELL, PTA_SKYLAKE_AVX512}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT}, @@ -4691,6 +4691,11 @@ ix86_option_override_internal (bool main_args_p, if (TARGET_AVX128_OPTIMAL && !(opts_set->x_target_flags & MASK_PREFER_AVX128)) opts->x_target_flags |= MASK_PREFER_AVX128; + /* Use 256-bit AVX instructions instead of 512-bit AVX instructions + in the auto-vectorizer. */ + if (ix86_tune_features[X86_TUNE_AVX256_OPTIMAL] + && !(opts_set->x_ix86_target_flags & OPTION_MASK_PREFER_AVX256)) + opts->x_ix86_target_flags |= OPTION_MASK_PREFER_AVX256; if (opts->x_ix86_recip_name) { @@ -31115,6 +31120,7 @@ get_builtin_code_for_version (tree decl, tree *predicate_list) priority = P_PROC_AVX; break; case PROCESSOR_HASWELL: + case PROCESSOR_SKYLAKE_AVX512: if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) arg_str = "skylake-avx512"; else if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_XSAVES) diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 19fd2b5..415f73a 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -427,6 +427,10 @@ DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL, "256_unaligned_store_optimal" DEF_TUNE (X86_TUNE_AVX128_OPTIMAL, "avx128_optimal", m_BDVER | m_BTVER2 | m_ZNVER1) +/* X86_TUNE_AVX256_OPTIMAL: Use 256-bit AVX instructions instead of 512-bit AVX + instructions in the auto-vectorizer. */ +DEF_TUNE (X86_TUNE_AVX256_OPTIMAL, "avx256_optimal", m_SKYLAKE_AVX512) + /*****************************************************************************/ /* Historical relics: tuning flags that helps a specific old CPU designs */ /*****************************************************************************/ |