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| author | Jan Hubicka <jh@suse.cz> | 2003-02-09 23:59:20 +0100 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2003-02-09 22:59:20 +0000 |
| commit | 35c28a133076b6ccf420e795bb1ac1dec90f67e1 (patch) | |
| tree | 33ea57a7eeeb08f3c9e13526fc91e383984a7bc6 | |
| parent | 852c8ba12e7824f881bd52a16af2a033a798cb23 (diff) | |
| download | gcc-35c28a133076b6ccf420e795bb1ac1dec90f67e1.zip gcc-35c28a133076b6ccf420e795bb1ac1dec90f67e1.tar.gz gcc-35c28a133076b6ccf420e795bb1ac1dec90f67e1.tar.bz2 | |
* i386.md (floathi*): Deal with SSE.
From-SVN: r62611
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 34 |
2 files changed, 34 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e7449de..6ef5c84 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +Sun Feb 9 23:58:33 CET 2003 Jan Hubicka <jh@suse.cz> + + * i386.md (floathi*): Deal with SSE. + Sun Feb 9 23:54:59 CET 2003 Jan Hubicka <jh@suse.cz> * simplify-rtx.c (simplify_unary_operation, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 97c6d9e..a751513 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4842,10 +4842,23 @@ ;; Even though we only accept memory inputs, the backend _really_ ;; wants to be able to do this between registers. -(define_insn "floathisf2" +(define_expand "floathisf2" + [(set (match_operand:SF 0 "register_operand" "") + (float:SF (match_operand:HI 1 "nonimmediate_operand" "")))] + "TARGET_SSE || TARGET_80387" +{ + if (TARGET_SSE && TARGET_SSE_MATH) + { + emit_insn (gen_floatsisf2 (operands[0], + convert_to_mode (SImode, operands[1], 0))); + DONE; + } +}) + +(define_insn "*floathisf2_1" [(set (match_operand:SF 0 "register_operand" "=f,f") (float:SF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] - "TARGET_80387 && !TARGET_SSE" + "TARGET_80387 && (!TARGET_SSE || !TARGET_SSE_MATH)" "@ fild%z1\t%1 #" @@ -4956,10 +4969,23 @@ DONE; }) -(define_insn "floathidf2" +(define_expand "floathidf2" + [(set (match_operand:DF 0 "register_operand" "") + (float:DF (match_operand:HI 1 "nonimmediate_operand" "")))] + "TARGET_SSE2 || TARGET_80387" +{ + if (TARGET_SSE && TARGET_SSE_MATH) + { + emit_insn (gen_floatsidf2 (operands[0], + convert_to_mode (SImode, operands[1], 0))); + DONE; + } +}) + +(define_insn "*floathidf2_1" [(set (match_operand:DF 0 "register_operand" "=f,f") (float:DF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] - "TARGET_80387 && !TARGET_SSE2" + "TARGET_80387 && (!TARGET_SSE2 || !TARGET_SSE_MATH)" "@ fild%z1\t%1 #" |