diff options
| author | Olivier Hainque <hainque@adacore.com> | 2010-10-06 14:08:48 +0000 |
|---|---|---|
| committer | Olivier Hainque <hainque@gcc.gnu.org> | 2010-10-06 14:08:48 +0000 |
| commit | 35c2682003f74070aab4098770c3444bac2586c4 (patch) | |
| tree | e7a3421060e9aae3419dd2599cd38ce1859488fb | |
| parent | adb18384bdd9a40483f03bed8389cd91ad03d0a4 (diff) | |
| download | gcc-35c2682003f74070aab4098770c3444bac2586c4.zip gcc-35c2682003f74070aab4098770c3444bac2586c4.tar.gz gcc-35c2682003f74070aab4098770c3444bac2586c4.tar.bz2 | |
rs6000.c (rs6000_expand_ternop_builtin): Rewrite switch on insn codes as sequence of ifs.
* config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Rewrite
switch on insn codes as sequence of ifs.
From-SVN: r165025
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 48 |
2 files changed, 30 insertions, 23 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 66f22dc..441293c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2010-10-06 Olivier Hainque <hainque@adacore.com> + + * config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Rewrite + switch on insn codes as sequence of ifs. + 2010-10-06 Hariharan Sandanagobalane <hariharan@picochip.com> * config/picochip/picochip.c (TARGET_EXCEPT_UNWIND_INFO): Define it to be UI_NONE for picochip. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 030bb61..adc1d13 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -10904,12 +10904,18 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || arg2 == error_mark_node) return const0_rtx; - switch (icode) + /* Check and prepare argument depending on the instruction code. + + Note that a switch statement instead of the sequence of tests + would be incorrect as many of the CODE_FOR values could be + CODE_FOR_nothing and that would yield multiple alternatives + with identical values. We'd never reach here at runtime in + this case. */ + if (icode == CODE_FOR_altivec_vsldoi_v4sf + || icode == CODE_FOR_altivec_vsldoi_v4si + || icode == CODE_FOR_altivec_vsldoi_v8hi + || icode == CODE_FOR_altivec_vsldoi_v16qi) { - case CODE_FOR_altivec_vsldoi_v4sf: - case CODE_FOR_altivec_vsldoi_v4si: - case CODE_FOR_altivec_vsldoi_v8hi: - case CODE_FOR_altivec_vsldoi_v16qi: /* Only allow 4-bit unsigned literals. */ STRIP_NOPS (arg2); if (TREE_CODE (arg2) != INTEGER_CST @@ -10918,16 +10924,16 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) error ("argument 3 must be a 4-bit unsigned literal"); return const0_rtx; } - break; - - case CODE_FOR_vsx_xxpermdi_v2df: - case CODE_FOR_vsx_xxpermdi_v2di: - case CODE_FOR_vsx_xxsldwi_v16qi: - case CODE_FOR_vsx_xxsldwi_v8hi: - case CODE_FOR_vsx_xxsldwi_v4si: - case CODE_FOR_vsx_xxsldwi_v4sf: - case CODE_FOR_vsx_xxsldwi_v2di: - case CODE_FOR_vsx_xxsldwi_v2df: + } + else if (icode == CODE_FOR_vsx_xxpermdi_v2df + || icode == CODE_FOR_vsx_xxpermdi_v2di + || icode == CODE_FOR_vsx_xxsldwi_v16qi + || icode == CODE_FOR_vsx_xxsldwi_v8hi + || icode == CODE_FOR_vsx_xxsldwi_v4si + || icode == CODE_FOR_vsx_xxsldwi_v4sf + || icode == CODE_FOR_vsx_xxsldwi_v2di + || icode == CODE_FOR_vsx_xxsldwi_v2df) + { /* Only allow 2-bit unsigned literals. */ STRIP_NOPS (arg2); if (TREE_CODE (arg2) != INTEGER_CST @@ -10936,10 +10942,10 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) error ("argument 3 must be a 2-bit unsigned literal"); return const0_rtx; } - break; - - case CODE_FOR_vsx_set_v2df: - case CODE_FOR_vsx_set_v2di: + } + else if (icode == CODE_FOR_vsx_set_v2df + || icode == CODE_FOR_vsx_set_v2di) + { /* Only allow 1-bit unsigned literals. */ STRIP_NOPS (arg2); if (TREE_CODE (arg2) != INTEGER_CST @@ -10948,10 +10954,6 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) error ("argument 3 must be a 1-bit unsigned literal"); return const0_rtx; } - break; - - default: - break; } if (target == 0 |