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| author | David Edelsohn <edelsohn@gnu.org> | 2003-03-03 21:57:25 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2003-03-03 16:57:25 -0500 |
| commit | 3317bab1bd10c9d37a3844723eccfd862af5e033 (patch) | |
| tree | c3b6f7c2f37b28ef444dde3336702bd2cea92946 | |
| parent | 7993382ed00da10f470ccfe78d9f67301b0cdadd (diff) | |
| download | gcc-3317bab1bd10c9d37a3844723eccfd862af5e033.zip gcc-3317bab1bd10c9d37a3844723eccfd862af5e033.tar.gz gcc-3317bab1bd10c9d37a3844723eccfd862af5e033.tar.bz2 | |
rs6000.c (rs6000_multipass_dfa_lookahead): Delete.
* config/rs6000/rs6000.c (rs6000_multipass_dfa_lookahead): Delete.
(TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Delete.
(rs6000_variable_issue): Do not return negative value.
(rs6000_issue_rate): Uniformly set issue rate to 1 for first
scheduling pass.
From-SVN: r63736
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 18 |
2 files changed, 13 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09c7c4c..f91e2d8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2003-03-03 David Edelsohn <edelsohn@gnu.org> + + * config/rs6000/rs6000.c (rs6000_multipass_dfa_lookahead): Delete. + (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Delete. + (rs6000_variable_issue): Do not return negative value. + (rs6000_issue_rate): Uniformly set issue rate to 1 for first + scheduling pass. + 2003-03-03 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz> * dwarf2out.c (dwarf2out_finish): Swap order of break_out_includes and diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9189614..5915e0a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -228,7 +228,6 @@ static void rs6000_xcoff_encode_section_info PARAMS ((tree, int)) ATTRIBUTE_UNUSED; static bool rs6000_binds_local_p PARAMS ((tree)); static int rs6000_use_dfa_pipeline_interface PARAMS ((void)); -static int rs6000_multipass_dfa_lookahead PARAMS ((void)); static int rs6000_variable_issue PARAMS ((FILE *, int, rtx, int)); static bool rs6000_rtx_costs PARAMS ((rtx, int, int, int *)); static int rs6000_adjust_cost PARAMS ((rtx, rtx, rtx, int)); @@ -386,8 +385,6 @@ static const char alt_reg_names[][8] = #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE rs6000_use_dfa_pipeline_interface -#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD -#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD rs6000_multipass_dfa_lookahead #undef TARGET_SCHED_VARIABLE_ISSUE #define TARGET_SCHED_VARIABLE_ISSUE rs6000_variable_issue @@ -12228,15 +12225,6 @@ rs6000_use_dfa_pipeline_interface () return 1; } -static int -rs6000_multipass_dfa_lookahead () -{ - if (rs6000_cpu == PROCESSOR_POWER4) - return 4; - else - return 1; -} - /* Power4 load update and store update instructions are cracked into a load or store and an integer insn which are executed in the same cycle. Branches have their own dispatch slot which does not count against the @@ -12264,7 +12252,7 @@ rs6000_variable_issue (stream, verbose, insn, more) else if (type == TYPE_LOAD_U || type == TYPE_STORE_U || type == TYPE_FPLOAD_U || type == TYPE_FPSTORE_U || type == TYPE_LOAD_EXT || type == TYPE_DELAYED_CR) - return more - 2; + return more > 2 ? more - 2 : 0; else return more - 1; } @@ -12380,6 +12368,10 @@ rs6000_adjust_priority (insn, priority) static int rs6000_issue_rate () { + /* Use issue rate of 1 for first scheduling pass to decrease degradation. */ + if (!reload_completed) + return 1; + switch (rs6000_cpu_attr) { case CPU_RIOS1: /* ? */ case CPU_RS64A: |