entered into RCS

From-SVN: r1167

2 files changed, 63 insertions, 269 deletions

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index fc069d8..87e2879 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -125,7 +125,6 @@ extern unsigned long	compute_frame_size ();
 extern void		expand_block_move ();
 extern int		equality_op ();
 extern int		fcmp_op ();
-extern void		final_prescan_insn ();
 extern int		fpsw_register_operand ();
 extern struct rtx_def *	function_arg ();
 extern void		function_arg_advance ();
@@ -136,7 +135,6 @@ extern void		gen_conditional_branch ();
 extern struct rtx_def * gen_int_relational ();
 extern void		init_cumulative_args ();
 extern int		large_int ();
-extern int		lui_int ();
 extern int		md_register_operand ();
 extern int		mips_address_cost ();
 extern void		mips_asm_file_end ();
@@ -430,7 +428,7 @@ while (0)
 
 /* Print subsidiary information on the compiler version in use.  */
 
-#define MIPS_VERSION "[AL 1.1, MM 20]"
+#define MIPS_VERSION "[AL 1.1, MM 19]"
 
 #ifndef MACHINE_TYPE
 #define MACHINE_TYPE "BSD Mips"
@@ -2444,8 +2442,8 @@ while (0)
 #define CLASS_DIVMOD_OP		0x02	/* operator is {,U}{DIV,MOD} */
 #define CLASS_UNSIGNED_OP	0x04	/* operator is U{DIV,MOD} */
 #define CLASS_CMP_OP		0x08	/* operator is comparison */
-#define CLASS_FCMP_OP		0x08	/* operator is fp. compare */
 #define CLASS_EQUALITY_OP	0x10	/* operator is == or != */
+#define CLASS_FCMP_OP		0x08	/* operator is fp. compare */
 
 #define CLASS_UNS_CMP_OP	(CLASS_UNSIGNED_OP | CLASS_CMP_OP)
 
@@ -2506,7 +2504,47 @@ while (0)
    statistics.  */
 
 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)			\
-  final_prescan_insn (INSN, OPVEC, NOPERANDS)
+do									\
+  {									\
+    if (dslots_number_nops > 0 && mips_load_reg != (rtx)0)		\
+      {									\
+	enum machine_mode mode = GET_MODE (mips_load_reg);		\
+	rtx pattern = PATTERN (INSN);					\
+									\
+	if (reg_mentioned_p (mips_load_reg, pattern)			\
+	    || (mips_load_reg2 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg2, pattern))		\
+	    || (mips_load_reg3 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg3, pattern))		\
+	    || (mips_load_reg4 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg4, pattern))		\
+	    || get_attr_length (INSN) == 0)				\
+	  {								\
+	    fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
+	  }								\
+	else								\
+	  dslots_load_filled++;						\
+									\
+	while (--dslots_number_nops > 0)				\
+	  fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
+									\
+	mips_load_reg  = (rtx)0;					\
+	mips_load_reg2 = (rtx)0;					\
+	mips_load_reg3 = (rtx)0;					\
+	mips_load_reg4 = (rtx)0;					\
+									\
+	if (set_noreorder && --set_noreorder == 0)			\
+	  fputs ("\t.set\treorder\n", asm_out_file);			\
+      }									\
+									\
+    if (TARGET_STATS)							\
+      {									\
+	enum rtx_code code = GET_CODE (INSN);				\
+	if (code == JUMP_INSN || code == CALL_INSN)			\
+	  dslots_jump_total++;						\
+      }									\
+  }									\
+while (0)
 
 
 /* Tell final.c how to eliminate redundant test instructions.
@@ -3272,3 +3310,4 @@ while (0)
 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
+
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 761409a..00cae6d 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -69,14 +69,6 @@
 		(const_string "yes")
 		(const_string "no")))
 
-;; Attribute to indicate if an instruction is 'safe' to fill a load
-;; delay slot because the first real instruction geneated is something
-;; like load of $1 or a clobbered register.  Logical operations (&, |, ^)
-;; which have operand[2] being a large integer constant fall into
-;; this category.
-
-(define_attr "safe" "no,yes" (const_string "no"))
-
 ;; Attribute describing the processor.  This attribute must match exactly
 ;; with the processor_type enumeration in mips.h.
 
@@ -1161,98 +1153,19 @@ move\\t%0,%z4\\n\\
 ;; the optimizer can fold things together, at the expense of not moving the
 ;; constant out of loops.
 
-(define_expand "andsi3"
-  [(set (match_operand:SI 0 "register_operand" "=d")
-	(and:SI (match_operand:SI 1 "arith32_operand" "dKIM")
-		(match_operand:SI 2 "arith32_operand" "dKIM")))]
-  ""
-  "
-{
-  extern rtx gen_andsi3_internal2 ();
-
-  /* Canonlicalize */
-  if (GET_CODE (operands[1]) == CONST_INT)
-    {
-      rtx temp;
-
-      if (GET_CODE (operands[2]) == CONST_INT)
-	{
-	  emit_move_insn (operands[0],
-			  gen_rtx (CONST_INT, VOIDmode,
-				   INTVAL (operands[1]) & INTVAL (operands[2])));
-	  DONE;
-	}
-
-      temp = operands[1];
-      operands[1] = operands[2];
-      operands[2] = temp;
-    }
-
-  if (GET_CODE (operands[2]) == CONST_INT && !SMALL_INT_UNSIGNED (operands[2]))
-    {
-      emit_insn (gen_andsi3_internal2 (operands[0],
-				       operands[1],
-				       operands[2],
-				       gen_reg_rtx (SImode)));
-      DONE;
-    }
-}")
-
-(define_insn "andsi3_internal1"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-	(and:SI (match_operand:SI 1 "arith32_operand" "%d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K")))]
-  ""
-  "@
-   and\\t%0,%1,%2
-   andi\\t%0,%1,%x2"
-  [(set_attr "type"	"arith")
-   (set_attr "mode"	"SI")
-   (set_attr "length"	"1")])
-
-(define_insn "andsi3_internal2"
-  [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
+(define_insn "andsi3"
+  [(set (match_operand:SI 0 "register_operand" "=d,d,?d,?d")
 	(and:SI (match_operand:SI 1 "arith32_operand" "%d,d,d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))
-   (clobber (match_operand:SI 3 "register_operand" "=d,d,d,d"))]
+		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))]
   ""
   "@
    and\\t%0,%1,%2
    andi\\t%0,%1,%x2
-   lui\\t%3,(%X2)>>16\;and\\t%0,%1,%3
-   li\\t%3,%X2\;and\\t%0,%1,%3"
+   %[li\\t%@,%X2\;and\\t%0,%1,%@%]
+   %[li\\t%@,%X2\;and\\t%0,%1,%@%]"
   [(set_attr "type"	"arith,arith,multi,multi")
    (set_attr "mode"	"SI")
-   (set_attr "length"	"1,1,2,3")
-   (set_attr "safe"	"no,no,yes,yes")])
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(and:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "lui_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 2))
-   (set (match_dup 0) (and:SI (match_dup 1) (match_dup 3)))]
-  "")
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(and:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "large_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 4))
-   (set (match_dup 3) (ior:SI (match_dup 3) (match_dup 5)))
-   (set (match_dup 0) (and:SI (match_dup 1) (match_dup 3)))]
-  "
-{
-  int val = INTVAL (operands[2]);
-  operands[4] = gen_rtx (CONST_INT, VOIDmode, val & 0xffff0000);
-  operands[5] = gen_rtx (CONST_INT, VOIDmode, val & 0x0000ffff);
-}")
+   (set_attr "length"	"1,1,2,3")])
 
 (define_insn "anddi3"
   [(set (match_operand:DI 0 "register_operand" "=d")
@@ -1277,98 +1190,19 @@ move\\t%0,%z4\\n\\
    (set (subreg:SI (match_dup 0) 1) (and:SI (subreg:SI (match_dup 1) 1) (subreg:SI (match_dup 2) 1)))]
   "")
 
-(define_expand "iorsi3"
-  [(set (match_operand:SI 0 "register_operand" "=d")
-	(ior:SI (match_operand:SI 1 "arith32_operand" "dKIM")
-		(match_operand:SI 2 "arith32_operand" "dKIM")))]
-  ""
-  "
-{
-  extern rtx gen_iorsi3_internal2 ();
-
-  /* Canonlicalize */
-  if (GET_CODE (operands[1]) == CONST_INT)
-    {
-      rtx temp;
-
-      if (GET_CODE (operands[2]) == CONST_INT)
-	{
-	  emit_move_insn (operands[0],
-			  gen_rtx (CONST_INT, VOIDmode,
-				   INTVAL (operands[1]) | INTVAL (operands[2])));
-	  DONE;
-	}
-
-      temp = operands[1];
-      operands[1] = operands[2];
-      operands[2] = temp;
-    }
-
-  if (GET_CODE (operands[2]) == CONST_INT && !SMALL_INT_UNSIGNED (operands[2]))
-    {
-      emit_insn (gen_iorsi3_internal2 (operands[0],
-				       operands[1],
-				       operands[2],
-				       gen_reg_rtx (SImode)));
-      DONE;
-    }
-}")
-
-(define_insn "iorsi3_internal1"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-	(ior:SI (match_operand:SI 1 "arith32_operand" "%d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K")))]
-  ""
-  "@
-   or\\t%0,%1,%2
-   ori\\t%0,%1,%x2"
-  [(set_attr "type"	"arith")
-   (set_attr "mode"	"SI")
-   (set_attr "length"	"1")])
-
-(define_insn "iorsi3_internal2"
-  [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
+(define_insn "iorsi3"
+  [(set (match_operand:SI 0 "register_operand" "=d,d,?d,?d")
 	(ior:SI (match_operand:SI 1 "arith32_operand" "%d,d,d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))
-   (clobber (match_operand:SI 3 "register_operand" "=d,d,d,d"))]
+		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))]
   ""
   "@
    or\\t%0,%1,%2
    ori\\t%0,%1,%x2
-   lui\\t%3,(%X2)>>16\;or\\t%0,%1,%3
-   li\\t%3,%X2\;or\\t%0,%1,%3"
+   %[li\\t%@,%X2\;or\\t%0,%1,%@%]
+   %[li\\t%@,%X2\;or\\t%0,%1,%@%]"
   [(set_attr "type"	"arith,arith,multi,multi")
    (set_attr "mode"	"SI")
-   (set_attr "length"	"1,1,2,3")
-   (set_attr "safe"	"no,no,yes,yes")])
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(ior:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "lui_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 2))
-   (set (match_dup 0) (ior:SI (match_dup 1) (match_dup 3)))]
-  "")
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(ior:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "large_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 4))
-   (set (match_dup 3) (ior:SI (match_dup 3) (match_dup 5)))
-   (set (match_dup 0) (ior:SI (match_dup 1) (match_dup 3)))]
-  "
-{
-  int val = INTVAL (operands[2]);
-  operands[4] = gen_rtx (CONST_INT, VOIDmode, val & 0xffff0000);
-  operands[5] = gen_rtx (CONST_INT, VOIDmode, val & 0x0000ffff);
-}")
+   (set_attr "length"	"1,1,2,3")])
 
 (define_insn "iordi3"
   [(set (match_operand:DI 0 "register_operand" "=d")
@@ -1393,99 +1227,19 @@ move\\t%0,%z4\\n\\
    (set (subreg:SI (match_dup 0) 1) (ior:SI (subreg:SI (match_dup 1) 1) (subreg:SI (match_dup 2) 1)))]
   "")
 
-(define_expand "xorsi3"
-  [(set (match_operand:SI 0 "register_operand" "=d")
-	(xor:SI (match_operand:SI 1 "arith32_operand" "dKIM")
-		(match_operand:SI 2 "arith32_operand" "dKIM")))]
-  ""
-  "
-{
-  extern rtx gen_xorsi3_internal2 ();
-
-  /* Canonlicalize */
-  if (GET_CODE (operands[1]) == CONST_INT)
-    {
-      rtx temp;
-
-      if (GET_CODE (operands[2]) == CONST_INT)
-	{
-	  emit_move_insn (operands[0],
-			  gen_rtx (CONST_INT, VOIDmode,
-				   INTVAL (operands[1]) ^ INTVAL (operands[2])));
-	  DONE;
-	}
-
-      temp = operands[1];
-      operands[1] = operands[2];
-      operands[2] = temp;
-    }
-
-  if (GET_CODE (operands[2]) == CONST_INT && !SMALL_INT_UNSIGNED (operands[2]))
-    {
-      emit_insn (gen_xorsi3_internal2 (operands[0],
-				       operands[1],
-				       operands[2],
-				       gen_reg_rtx (SImode)));
-      DONE;
-    }
-}")
-
-(define_insn "xorsi3_internal1"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-	(xor:SI (match_operand:SI 1 "arith32_operand" "%d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K")))]
-  ""
-  "@
-   xor\\t%0,%1,%2
-   xori\\t%0,%1,%x2"
-  [(set_attr "type"	"arith")
-   (set_attr "mode"	"SI")
-   (set_attr "length"	"1")])
-
-(define_insn "xorsi3_internal2"
-  [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
+(define_insn "xorsi3"
+  [(set (match_operand:SI 0 "register_operand" "=d,d,?d,?d")
 	(xor:SI (match_operand:SI 1 "arith32_operand" "%d,d,d,d")
-		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))
-   (clobber (match_operand:SI 3 "register_operand" "=d,d,d,d"))]
+		(match_operand:SI 2 "arith32_operand" "d,K,I,M")))]
   ""
   "@
    xor\\t%0,%1,%2
    xori\\t%0,%1,%x2
-   lui\\t%3,(%X2)>>16\;xor\\t%0,%1,%3
-   li\\t%3,%X2\;xor\\t%0,%1,%3"
+   %[li\\t%@,%X2\;xor\\t%0,%1,%@%]
+   %[li\\t%@,%X2\;xor\\t%0,%1,%@%]"
   [(set_attr "type"	"arith,arith,multi,multi")
    (set_attr "mode"	"SI")
-   (set_attr "length"	"1,1,2,3")
-   (set_attr "safe"	"no,no,yes,yes")])
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(xor:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "lui_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 2))
-   (set (match_dup 0) (xor:SI (match_dup 1) (match_dup 3)))]
-  "")
-
-(define_split
-  [(set (match_operand:SI 0 "register_operand" "")
-	(xor:SI (match_operand:SI 1 "register_operand" "")
-		(match_operand:SI 2 "large_int" "")))
-   (clobber (match_operand:SI 3 "register_operand" ""))]
-  "reload_completed && !TARGET_DEBUG_D_MODE"
-
-  [(set (match_dup 3) (match_dup 4))
-   (set (match_dup 3) (ior:SI (match_dup 3) (match_dup 5)))
-   (set (match_dup 0) (xor:SI (match_dup 1) (match_dup 3)))]
-  "
-{
-  int val = INTVAL (operands[2]);
-  operands[4] = gen_rtx (CONST_INT, VOIDmode, val & 0xffff0000);
-  operands[5] = gen_rtx (CONST_INT, VOIDmode, val & 0x0000ffff);
-}")
-
+   (set_attr "length"	"1,1,2,3")])
 
 (define_insn "xordi3"
   [(set (match_operand:DI 0 "register_operand" "=d")
@@ -4239,3 +3993,4 @@ move\\t%0,%z4\\n\\
 ;; eval: (modify-syntax-entry ?{ "(}")
 ;; eval: (modify-syntax-entry ?} "){")
 ;; End:
+