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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-09-26 18:45:26 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-09-26 18:45:26 +0000 |
| commit | 2f448503d619f753f0bd6ecb1ac95e36bd080f1e (patch) | |
| tree | 93729301614e7b8d48374c0740f9861c6c84d044 | |
| parent | 885b8230a1f49f57720582b6bc811868e7acc418 (diff) | |
| download | gcc-2f448503d619f753f0bd6ecb1ac95e36bd080f1e.zip gcc-2f448503d619f753f0bd6ecb1ac95e36bd080f1e.tar.gz gcc-2f448503d619f753f0bd6ecb1ac95e36bd080f1e.tar.bz2 | |
vsx.md (vsx_xscvspdp_scalar2): Move insn so that it is adjacent to the other XSCVSPDP insns.
2017-09-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Move insn so that
it is adjacent to the other XSCVSPDP insns.
From-SVN: r253212
| -rw-r--r-- | gcc/ChangeLog | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 18 |
2 files changed, 11 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7c8ff6c..75ca6db 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -14,6 +14,8 @@ (movsi_from_df): Optimize converting a DFmode to a SFmode, and then needing to move the SFmode to a GPR to use the XSCVDPSP instruction instead of FRSP and XSCVDPSPN. + * config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Move insn so that + it is adjacent to the other XSCVSPDP insns. 2017-09-26 Martin Jambor <mjambor@suse.cz> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 9b24c7b..3c54d4a 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1781,6 +1781,15 @@ "xscvspdp %x0,%x1" [(set_attr "type" "fp")]) +;; Same as vsx_xscvspdp, but use SF as the type +(define_insn "vsx_xscvspdp_scalar2" + [(set (match_operand:SF 0 "vsx_register_operand" "=ww") + (unspec:SF [(match_operand:V4SF 1 "vsx_register_operand" "wa")] + UNSPEC_VSX_CVSPDP))] + "VECTOR_UNIT_VSX_P (V4SFmode)" + "xscvspdp %x0,%x1" + [(set_attr "type" "fp")]) + ;; Generate xvcvhpsp instruction (define_insn "vsx_xvcvhpsp" [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") @@ -1800,15 +1809,6 @@ "xscvdpsp %x0,%x1" [(set_attr "type" "fp")]) -;; Same as vsx_xscvspdp, but use SF as the type -(define_insn "vsx_xscvspdp_scalar2" - [(set (match_operand:SF 0 "vsx_register_operand" "=ww") - (unspec:SF [(match_operand:V4SF 1 "vsx_register_operand" "wa")] - UNSPEC_VSX_CVSPDP))] - "VECTOR_UNIT_VSX_P (V4SFmode)" - "xscvspdp %x0,%x1" - [(set_attr "type" "fp")]) - ;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs (define_insn "vsx_xscvdpspn" [(set (match_operand:V4SF 0 "vsx_register_operand" "=ww,?ww") |