h8300.h (h8300_funcvec_function_p): Declaration moved here.

        * h8300.h (h8300_funcvec_function_p): Declaration moved here.
        * h8300.c (h8300_funcvec_function_p): Declaration removed
        from here.
        * h8300.md (tstqi): Tweak to work like other tstXX patterns.
        (cmphi): Turn into a define_expand.  Add two anonymous
        matterns to match the output of the cmphi expander.
        (cmpsi): Accept constants as the second input operand.

From-SVN: r11656

3 files changed, 33 insertions, 10 deletions

diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 8abe7d7..25ccff5 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -41,7 +41,6 @@ void print_operand_address ();
 char *index ();
 
 static int h8300_interrupt_function_p PROTO ((tree));
-static int h8300_funcvec_function_p PROTO ((tree));
 
 /* CPU_TYPE, says what cpu we're compiling for.  */
 int cpu_type;
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 2a0f451..f2bee2c 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -1334,5 +1334,4 @@ do { char dstr[30];					\
 
 /* Declarations for functions used in insn-output.c.  */
 char *emit_a_shift ();
-
-
+int h8300_funcvec_function_p ();
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 6dd9f7d..4555fcb 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -35,6 +35,12 @@
 ;; Some move patterns have conditions which check that one operand
 ;; is a register.  Shouldn't all of them have such a condition?
 
+;; Loading some 32bit integer constants could be done more
+;; efficiently.  For example loading the value 4 as a 32bit
+;; is normally done via mov.l #4,erX.  sub.l erX,erX, inc.l #4,erX 
+;; would be more efficient time and space-wise.
+
+
 (define_attr "type" "branch,return,call,arith,move,float,multi"
   (const_string "arith"))
 
@@ -406,9 +412,9 @@
 ;; ----------------------------------------------------------------------
 
 (define_insn "tstqi"
-  [(set (cc0) (match_operand:QI 0 "register_operand" "ra"))]
+  [(set (cc0) (match_operand:QI 0 "general_operand" "ra"))]
   ""
-  "cmp.b	#0,%X0"
+  "mov.b	%X0,%X0"
   [(set_attr "type" "arith")
    (set_attr "length" "2")
    (set_attr "cc" "set")])
@@ -439,24 +445,43 @@
    (set_attr "length" "2")
    (set_attr "cc" "compare")])
 
-;; ??? 300h can have an immediate operand here.
+(define_expand "cmphi"
+  [(set (cc0)
+	(compare:HI (match_operand:HI 0 "register_operand" "")
+		    (match_operand:HI 1 "nonmemory_operand" "")))]
+  ""
+  "
+{
+  /* Force operand1 into a register if we're compiling
+     for the h8/300.  */
+  if (GET_CODE (operands[1]) != REG && !TARGET_H8300H)
+    operands[1] = force_reg (HImode, operands[1]);
+}")
 
-(define_insn "cmphi"
+(define_insn ""
   [(set (cc0)
 	(compare:HI (match_operand:HI 0 "register_operand" "ra")
 		    (match_operand:HI 1 "register_operand" "ra")))]
-  ""
+  "!TARGET_H8300H"
   "cmp.w	%T1,%T0"
   [(set_attr "type" "arith")
    (set_attr "length" "2")
    (set_attr "cc" "compare")])
 
-;; ??? 300h can have an immediate operand here.
+(define_insn ""
+  [(set (cc0)
+	(compare:HI (match_operand:HI 0 "register_operand" "ra")
+		    (match_operand:HI 1 "nonmemory_operand" "rai")))]
+  "TARGET_H8300H"
+  "cmp.w	%T1,%T0"
+  [(set_attr "type" "arith")
+   (set_attr "length" "2")
+   (set_attr "cc" "compare")])
 
 (define_insn "cmpsi"
   [(set (cc0)
 	(compare:SI (match_operand:SI 0 "register_operand" "ra")
-		    (match_operand:SI 1 "register_operand" "ra")))]
+		    (match_operand:SI 1 "nonmemory_operand" "rai")))]
   "TARGET_H8300H"
   "cmp.l	%S1,%S0"
   [(set_attr "type" "arith")