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authorTorbjorn Granlund <tege@gnu.org>1995-04-03 22:54:09 +0000
committerTorbjorn Granlund <tege@gnu.org>1995-04-03 22:54:09 +0000
commit28d29b39bc51b82d6f437cc29fa95b5d1495a2ed (patch)
tree875bf4e6908e41fe40def7ed9f40ffbfa88e15cc
parent67cd4f83cfddd1ae43bb5183a5ecc79d79528ef2 (diff)
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(umulsi3_highpart): Test for CONST_INT and CONST_DOUBLE, not CONSTANT_P.
(smulsi3_highpart): Likewise. (const_umulsi3_highpart): Use const_uint32_operand instead of immediate_operand for op3. Delete mode. (const_smulsi3_highpart): Analogous change. From-SVN: r9307
-rw-r--r--gcc/config/m68k/m68k.md18
1 files changed, 12 insertions, 6 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index eca3715..27b30d0 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -2907,9 +2907,12 @@
"
{
operands[3] = gen_reg_rtx (SImode);
- if (CONSTANT_P (operands[2]))
+ if (GET_CODE (operands[2]) == CONST_INT
+ || GET_CODE (operands[2]) == CONST_DOUBLE)
{
- /* We have to rearrange the operand order for the matching constraints. */
+ if (! const_uint32_operand (operands[2]))
+ abort ();
+ /* We have to adjust the operand order for the matching constraints. */
emit_insn (gen_const_umulsi3_highpart (operands[0], operands[3],
operands[1], operands[2]));
DONE;
@@ -2932,7 +2935,7 @@
(truncate:SI
(lshiftrt:DI
(mult:DI (zero_extend:DI (match_operand:SI 2 "register_operand" "1"))
- (match_operand:DI 3 "immediate_operand" "i"))
+ (match_operand 3 "const_uint32_operand" ""))
(const_int 32))))
(clobber (match_operand:SI 1 "register_operand" "=d"))]
"TARGET_68020"
@@ -2951,9 +2954,12 @@
"
{
operands[3] = gen_reg_rtx (SImode);
- if (CONSTANT_P (operands[2]))
+ if (GET_CODE (operands[2]) == CONST_INT
+ || GET_CODE (operands[2]) == CONST_DOUBLE)
{
- /* We have to rearrange the operand order for the matching constraints. */
+ if (! const_sint32_operand (operands[2]))
+ abort ();
+ /* We have to adjust the operand order for the matching constraints. */
emit_insn (gen_const_smulsi3_highpart (operands[0], operands[3],
operands[1], operands[2]));
DONE;
@@ -2976,7 +2982,7 @@
(truncate:SI
(lshiftrt:DI
(mult:DI (sign_extend:DI (match_operand:SI 2 "register_operand" "1"))
- (match_operand:DI 3 "immediate_operand" "i"))
+ (match_operand 3 "const_sint32_operand" ""))
(const_int 32))))
(clobber (match_operand:SI 1 "register_operand" "=d"))]
"TARGET_68020"