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author | Alex Coplan <alex.coplan@arm.com> | 2021-04-06 09:06:27 +0100 |
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committer | Alex Coplan <alex.coplan@arm.com> | 2021-04-06 09:06:27 +0100 |
commit | 16ea7f57891d3fe885ee55b2917208695e184714 (patch) | |
tree | bb559ff2aef563aac20195fa7580f9deaa2cc860 | |
parent | 55f40d968b0bd3be4478a9481e829a99ee0fa04f (diff) | |
download | gcc-16ea7f57891d3fe885ee55b2917208695e184714.zip gcc-16ea7f57891d3fe885ee55b2917208695e184714.tar.gz gcc-16ea7f57891d3fe885ee55b2917208695e184714.tar.bz2 |
arm: Fix PCS for SFmode -> SImode libcalls [PR99748]
This patch fixes PR99748 which shows us trying to pass the argument to
__aeabi_f2iz in the VFP register s0 when the library function is
expecting to use the GPR r0. It also fixes the __aeabi_f2uiz case which
was broken in the same way.
For the testcase in the PR, here is the code we generate before the
patch (with -mfloat-abi=hard -march=armv8.1-m.main+mve -O0):
main:
push {r7, lr}
sub sp, sp, #8
add r7, sp, #0
mov r3, #1065353216
str r3, [r7, #4] @ float
vldr.32 s0, [r7, #4]
bl __aeabi_f2iz
mov r3, r0
cmp r3, #1
[...]
This becomes:
main:
push {r7, lr}
sub sp, sp, #8
add r7, sp, #0
mov r3, #1065353216
str r3, [r7, #4] @ float
ldr r0, [r7, #4] @ float
bl __aeabi_f2iz
mov r3, r0
cmp r3, #1
[...]
after the patch. We see a similar change for the same testcase with a
cast to unsigned instead of int.
gcc/ChangeLog:
PR target/99748
* config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
PCS for [su]fix_optab.
-rw-r--r-- | gcc/config/arm/arm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 518bfed..8910dad 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5773,6 +5773,10 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) convert_optab_libfunc (sfix_optab, DImode, SFmode)); add_libcall (libcall_htab, convert_optab_libfunc (ufix_optab, DImode, SFmode)); + add_libcall (libcall_htab, + convert_optab_libfunc (sfix_optab, SImode, SFmode)); + add_libcall (libcall_htab, + convert_optab_libfunc (ufix_optab, SImode, SFmode)); /* Values from double-precision helper functions are returned in core registers if the selected core only supports single-precision |