diff options
| author | Chung-Ju Wu <jasonwucj@gmail.com> | 2018-04-05 01:35:00 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2018-04-05 01:35:00 +0000 |
| commit | 0aa683b35e94783203f72524954e9c473da45019 (patch) | |
| tree | cbf9c13a6deb7e019bb31e4f4cf2958bce256ee7 | |
| parent | f2a3aa64a7b623e77ac22192d6e612fd353ce1ff (diff) | |
| download | gcc-0aa683b35e94783203f72524954e9c473da45019.zip gcc-0aa683b35e94783203f72524954e9c473da45019.tar.gz gcc-0aa683b35e94783203f72524954e9c473da45019.tar.bz2 | |
[NDS32] Add subtype attribute for instructions.
gcc/
* config/nds32/nds32.md (subtype): New attribute.
From-SVN: r259112
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32.md | 22 |
2 files changed, 19 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e090230..d07fe81 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.md (subtype): New attribute. + 2018-04-04 Thomas Preud'homme <thomas.preudhomme@arm.com> PR target/85203 diff --git a/gcc/config/nds32/nds32.md b/gcc/config/nds32/nds32.md index afbea8b..a216507 100644 --- a/gcc/config/nds32/nds32.md +++ b/gcc/config/nds32/nds32.md @@ -55,6 +55,11 @@ "unknown,load,store,load_multiple,store_multiple,alu,alu_shift,mul,mac,div,branch,call,misc" (const_string "unknown")) +;; Insn sub-type +(define_attr "subtype" + "simple,shift" + (const_string "simple")) + ;; Length, in bytes, default is 4-bytes. (define_attr "length" "" (const_int 4)) @@ -736,6 +741,7 @@ rotri\t%0, %1, %2 rotr\t%0, %1, %2" [(set_attr "type" " alu, alu") + (set_attr "subtype" "shift,shift") (set_attr "length" " 4, 4")]) @@ -788,9 +794,9 @@ slli333\t%0, %1, %2 slli\t%0, %1, %2 sll\t%0, %1, %2" - [(set_attr "type" "alu,alu,alu") - (set_attr "length" " 2, 4, 4")]) - + [(set_attr "type" " alu, alu, alu") + (set_attr "subtype" "shift,shift,shift") + (set_attr "length" " 2, 4, 4")]) (define_insn "ashrsi3" [(set (match_operand:SI 0 "register_operand" "= d, r, r") (ashiftrt:SI (match_operand:SI 1 "register_operand" " 0, r, r") @@ -800,8 +806,9 @@ srai45\t%0, %2 srai\t%0, %1, %2 sra\t%0, %1, %2" - [(set_attr "type" "alu,alu,alu") - (set_attr "length" " 2, 4, 4")]) + [(set_attr "type" " alu, alu, alu") + (set_attr "subtype" "shift,shift,shift") + (set_attr "length" " 2, 4, 4")]) (define_insn "lshrsi3" [(set (match_operand:SI 0 "register_operand" "= d, r, r") @@ -812,8 +819,9 @@ srli45\t%0, %2 srli\t%0, %1, %2 srl\t%0, %1, %2" - [(set_attr "type" "alu,alu,alu") - (set_attr "length" " 2, 4, 4")]) + [(set_attr "type" " alu, alu, alu") + (set_attr "subtype" "shift,shift,shift") + (set_attr "length" " 2, 4, 4")]) ;; ---------------------------------------------------------------------------- |