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author | Andrew Pinski <pinskia@physics.uc.edu> | 2005-01-31 22:29:27 +0000 |
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committer | Andrew Pinski <pinskia@gcc.gnu.org> | 2005-01-31 14:29:27 -0800 |
commit | 0530bc70fbab2126ca2510ca18b61d01f949f38d (patch) | |
tree | 1c2c49703c635b6d04620244d7a003b5582fb8fb | |
parent | 3d8a8aade36871c292e4f374262e9946cb6aa83c (diff) | |
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rs6000.md (copysignsf3): New expand.
2005-01-31 Andrew Pinski <pinskia@physics.uc.edu>
* config/rs6000/rs6000.md (copysignsf3): New expand.
(copysigndf3): Likewise.
From-SVN: r94497
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 36 |
2 files changed, 41 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 76e28d1..8d618f5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2005-01-31 Andrew Pinski <pinskia@physics.uc.edu> + + * config/rs6000/rs6000.md (copysignsf3): New expand. + (copysigndf3): Likewise. + 2005-01-31 Steven Bosscher <stevenb@suse.de> * recog.c (constrain_operands): Only look for earlyclobber operand diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 988dc4b..7ccdab8 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4705,6 +4705,42 @@ "fsqrt %0,%1" [(set_attr "type" "dsqrt")]) +(define_expand "copysignsf3" + [(set (match_dup 3) + (abs:SF (match_operand:SF 1 "gpc_reg_operand" ""))) + (set (match_dup 4) + (neg:SF (abs:SF (match_dup 1)))) + (set (match_operand:SF 0 "gpc_reg_operand" "") + (if_then_else:SF (ge (match_operand:SF 2 "gpc_reg_operand" "") + (match_dup 5)) + (match_dup 3) + (match_dup 4)))] + "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS + && !HONOR_NANS (SFmode) && !HONOR_SIGNED_ZEROS (SFmode)" + { + operands[3] = gen_reg_rtx (SFmode); + operands[4] = gen_reg_rtx (SFmode); + operands[5] = CONST0_RTX (SFmode); + }) + +(define_expand "copysigndf3" + [(set (match_dup 3) + (abs:DF (match_operand:DF 1 "gpc_reg_operand" ""))) + (set (match_dup 4) + (neg:DF (abs:DF (match_dup 1)))) + (set (match_operand:DF 0 "gpc_reg_operand" "") + (if_then_else:DF (ge (match_operand:DF 2 "gpc_reg_operand" "") + (match_dup 5)) + (match_dup 3) + (match_dup 4)))] + "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS + && !HONOR_NANS (DFmode) && !HONOR_SIGNED_ZEROS (DFmode)" + { + operands[3] = gen_reg_rtx (DFmode); + operands[4] = gen_reg_rtx (DFmode); + operands[5] = CONST0_RTX (DFmode); + }) + ;; For MIN, MAX, and conditional move, we use DEFINE_EXPAND's that involve a ;; fsel instruction and some auxiliary computations. Then we just have a ;; single DEFINE_INSN for fsel and the define_splits to make them if made by |