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| author | Vladimir Makarov <vmakarov@redhat.com> | 2013-04-12 17:09:10 +0000 |
|---|---|---|
| committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 2013-04-12 17:09:10 +0000 |
| commit | fafb9b1865caa7e46b94e40d053b6ffa7466082b (patch) | |
| tree | 443c876292c3d29f066dcf03b199a8dadd521ad5 | |
| parent | 9a946fd66c0d8504a8360b19c07cfe19f70748cb (diff) | |
| download | gcc-fafb9b1865caa7e46b94e40d053b6ffa7466082b.zip gcc-fafb9b1865caa7e46b94e40d053b6ffa7466082b.tar.gz gcc-fafb9b1865caa7e46b94e40d053b6ffa7466082b.tar.bz2 | |
re PR rtl-optimization/56903 (gcc is 4.8.0 fails to compile netdev.c from the linux kernel [internal compiler error: Maximum number of LRA constraint passes is achieved])
2013-04-12 Vladimir Makarov <vmakarov@redhat.com>
PR target/56903
* config/i386/i386.c (ix86_hard_regno_mode_ok): Add
lra_in_progress for return.
2013-04-12 Vladimir Makarov <vmakarov@redhat.com>
PR target/56903
* gcc.target/i386/pr56903.c: New test.
From-SVN: r197927
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr56903.c | 18 |
4 files changed, 34 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26304ec..bf244c0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-04-12 Vladimir Makarov <vmakarov@redhat.com> + + PR target/56903 + * config/i386/i386.c (ix86_hard_regno_mode_ok): Add + lra_in_progress for return. + 2013-04-12 Greta Yorsh <Greta.Yorsh@arm.com> * config/arm/arm.md (mov_scc,mov_negscc,mov_notscc): Convert diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 9f5a24f..668bdde 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -33976,6 +33976,11 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode) return true; if (!TARGET_PARTIAL_REG_STALL) return true; + /* LRA checks if the hard register is OK for the given mode. + QImode values can live in non-QI regs, so we allow all + registers here. */ + if (lra_in_progress) + return true; return !can_create_pseudo_p (); } /* We handle both integer and floats in the general purpose registers. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 29a624e..b4fefc5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-04-12 Vladimir Makarov <vmakarov@redhat.com> + + PR target/56903 + * gcc.target/i386/pr56903.c: New test. + 2013-04-12 Janus Weil <janus@gcc.gnu.org> PR fortran/56261 diff --git a/gcc/testsuite/gcc.target/i386/pr56903.c b/gcc/testsuite/gcc.target/i386/pr56903.c new file mode 100644 index 0000000..9e6a1c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr56903.c @@ -0,0 +1,18 @@ +/* PR rtl-optimization/56903 */ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +/* { dg-additional-options "-march=pentium3" { target ia32 } } */ + +int a, *b, c; +struct S { int s : 1; } *fn1 (void); +extern int fn3 (void), fn4 (int *); + +void +fn2 (void) +{ + int e = fn3 (); + char f = c + fn1 ()->s * 4; + if (*b && f == e) + a = *b; + fn4 (b); +} |