AArch64: Implement poly-type vadd intrinsics

This implements the vadd[p]_p* intrinsics.
In terms of functionality they are aliases of veor operations on the relevant unsigned types.

Bootstrapped and tested on aarch64-none-linux-gnu.

gcc/
	PR target/71233
	* config/aarch64/arm_neon.h (vadd_p8, vadd_p16, vadd_p64, vaddq_p8,
	vaddq_p16, vaddq_p64, vaddq_p128): Define.

gcc/testsuite/
	PR target/71233
	* gcc.target/aarch64/simd/vadd_poly_1.c: New test.

2 files changed, 99 insertions, 0 deletions

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 50f8b23..81cabb2 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -35659,6 +35659,55 @@ vusmmlaq_s32 (int32x4_t __r, uint8x16_t __a, int8x16_t __b)
 
 #pragma GCC pop_options
 
+__extension__ extern __inline poly8x8_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vadd_p8 (poly8x8_t __a, poly8x8_t __b)
+{
+  return __a ^ __b;
+}
+
+__extension__ extern __inline poly16x4_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vadd_p16 (poly16x4_t __a, poly16x4_t __b)
+{
+  return __a ^ __b;
+}
+
+__extension__ extern __inline poly64x1_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vadd_p64 (poly64x1_t __a, poly64x1_t __b)
+{
+  return __a ^ __b;
+}
+
+__extension__ extern __inline poly8x16_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vaddq_p8 (poly8x16_t __a, poly8x16_t __b)
+{
+  return __a ^ __b;
+}
+
+__extension__ extern __inline poly16x8_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vaddq_p16 (poly16x8_t __a, poly16x8_t __b)
+{
+  return __a ^__b;
+}
+
+__extension__ extern __inline poly64x2_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vaddq_p64 (poly64x2_t __a, poly64x2_t __b)
+{
+  return __a ^ __b;
+}
+
+__extension__ extern __inline poly128_t
+__attribute ((__always_inline__, __gnu_inline__, __artificial__))
+vaddq_p128 (poly128_t __a, poly128_t __b)
+{
+  return __a ^ __b;
+}
+
 #undef __aarch64_vget_lane_any
 
 #undef __aarch64_vdup_lane_any
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vadd_poly_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vadd_poly_1.c
new file mode 100644
index 0000000..a5cdf29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vadd_poly_1.c
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+#include <arm_neon.h>
+
+poly8x8_t
+foo (poly8x8_t a, poly8x8_t b)
+{
+  return vadd_p8 (a, b);
+}
+
+poly16x4_t
+foo16 (poly16x4_t a, poly16x4_t b)
+{
+  return vadd_p16 (a, b);
+}
+
+poly64x1_t
+foo64 (poly64x1_t a, poly64x1_t b)
+{
+  return vadd_p64 (a, b);
+}
+
+poly8x16_t
+fooq (poly8x16_t a, poly8x16_t b)
+{
+  return vaddq_p8 (a, b);
+}
+
+poly16x8_t
+fooq16 (poly16x8_t a, poly16x8_t b)
+{
+  return vaddq_p16 (a, b);
+}
+
+poly64x2_t
+fooq64 (poly64x2_t a, poly64x2_t b)
+{
+  return vaddq_p64 (a, b);
+}
+
+poly128_t
+fooq128 (poly128_t a, poly128_t b)
+{
+  return vaddq_p128 (a, b);
+}
+
+/* { dg-final { scan-assembler-times "eor\\tv\[0-9\]+\.8b, v\[0-9\]+\.8b, v\[0-9\]+\.8b" 3 } } */
+/* { dg-final { scan-assembler-times "eor\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b, v\[0-9\]+\.16b" 3 } } */
+/* { dg-final { scan-assembler-times "eor\\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */