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| author | Uros Bizjak <uros@gcc.gnu.org> | 2008-04-21 20:41:04 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2008-04-21 20:41:04 +0200 |
| commit | f7546fa716b5617bd46712f6b042b1f40c31fe68 (patch) | |
| tree | 61e183903cfb47fb4fec80d674111e2ec379ea05 | |
| parent | d05739f8c4cb1eb3e10170d08391c01fdfe2aa35 (diff) | |
| download | gcc-f7546fa716b5617bd46712f6b042b1f40c31fe68.zip gcc-f7546fa716b5617bd46712f6b042b1f40c31fe68.tar.gz gcc-f7546fa716b5617bd46712f6b042b1f40c31fe68.tar.bz2 | |
re PR target/26445 (SSE byte-by-byte load instruction fails to compile)
PR target/26445
* g++.dg/other/i386-4.C: New test.
From-SVN: r134522
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/g++.dg/other/i386-4.C | 29 |
2 files changed, 35 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 64416f4..5cbca72 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2008-04-21 Uros Bizjak <ubizjak@gmail.com> + + PR target/26445 + * g++.dg/other/i386-4.C: New test. + 2008-04-21 Jason Merrill <jason@redhat.com> PR c++/35325 @@ -18,7 +23,7 @@ 2008-04-20 Jerry DeLisle <jvdelisle@gcc.gnu.org> PR fortran/35991 - gfortran.dg/zero-sized_4.f90: New test. + * gfortran.dg/zero-sized_4.f90: New test. 2008-04-20 Jerry DeLisle <jvdelisle@gcc.gnu.org> diff --git a/gcc/testsuite/g++.dg/other/i386-4.C b/gcc/testsuite/g++.dg/other/i386-4.C new file mode 100644 index 0000000..3e0d94e --- /dev/null +++ b/gcc/testsuite/g++.dg/other/i386-4.C @@ -0,0 +1,29 @@ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O1 -msse2" } */ + +#include <xmmintrin.h> + +void ConvertFloatSSE (void *inBuff, void *outBuff, int len) +{ + unsigned char *inByteBuffer = reinterpret_cast < unsigned char *>(inBuff); + float *outFloatBuffer = reinterpret_cast < float *>(outBuff); + + for (int i = 0; i < len / 4; i++) + { + __m128i register1 = + _mm_set_epi8 (*inByteBuffer, *(inByteBuffer + 1), + *(inByteBuffer + 2), 0, + *(inByteBuffer + 3), *(inByteBuffer + 4), + *(inByteBuffer + 5), 0, + *(inByteBuffer + 6), *(inByteBuffer + 7), + *(inByteBuffer + 8), 0, + *(inByteBuffer + 9), *(inByteBuffer + 10), + *(inByteBuffer + 11), 0); + __m128i register2 = _mm_srai_epi32 (register1, 8); + __m128 register3 = _mm_cvtepi32_ps (register2); + + _mm_store_ps (outFloatBuffer, register3); + outFloatBuffer += 4; + inByteBuffer += 12; + } +} |