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authorliuhongt <hongtao.liu@intel.com>2021-11-30 16:24:39 +0800
committerliuhongt <hongtao.liu@intel.com>2021-12-01 07:38:57 +0800
commitf5e2f2d0ad1b293c534338a72094926313e12039 (patch)
tree908679e68390326fe4f392c4fdff3a2c33de1e7f
parent0fc26e6f0b5e5a40f2649e98db605f4c740e2c4e (diff)
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Fix ICE in ix86_attr_length_immediate_default.
ix86_attr_length_immediate_default assume TYPE ishift only have 1 constant operand, but *x86_64_shld_1/*x86_shld_1/*x86_64_shrd_1/*x86_shrd_1 has 2, with condition: INTVAL (operands[3]) == 32 - INTVAL (operands[2]) or INTVAL (operands[3]) == 64 - INTVAL (operands[2]), and hit gcc_assert. Explicitly set_attr length_immediate for these patterns. gcc/ChangeLog: PR target/103463 PR target/103484 * config/i386/i386.md (*x86_64_shld_1): Set_attr length_immediate to 1. (*x86_shld_1): Ditto. (*x86_64_shrd_1): Ditto. (*x86_shrd_1): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr103463.c: New test. * gcc.target/i386/pr103463-2.c: New test.
-rw-r--r--gcc/config/i386/i386.md4
-rw-r--r--gcc/testsuite/gcc.target/i386/pr103463-2.c14
-rw-r--r--gcc/testsuite/gcc.target/i386/pr103463.c13
3 files changed, 31 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c88374c..4e9fae8 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -11512,6 +11512,7 @@
[(set_attr "type" "ishift")
(set_attr "prefix_0f" "1")
(set_attr "mode" "DI")
+ (set_attr "length_immediate" "1")
(set_attr "athlon_decode" "vector")
(set_attr "amdfam10_decode" "vector")
(set_attr "bdver1_decode" "vector")])
@@ -11573,6 +11574,7 @@
"shld{l}\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "ishift")
(set_attr "prefix_0f" "1")
+ (set_attr "length_immediate" "1")
(set_attr "mode" "SI")
(set_attr "pent_pair" "np")
(set_attr "athlon_decode" "vector")
@@ -12384,6 +12386,7 @@
"shrd{q}\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "ishift")
(set_attr "prefix_0f" "1")
+ (set_attr "length_immediate" "1")
(set_attr "mode" "DI")
(set_attr "athlon_decode" "vector")
(set_attr "amdfam10_decode" "vector")
@@ -12446,6 +12449,7 @@
"shrd{l}\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "ishift")
(set_attr "prefix_0f" "1")
+ (set_attr "length_immediate" "1")
(set_attr "mode" "SI")
(set_attr "pent_pair" "np")
(set_attr "athlon_decode" "vector")
diff --git a/gcc/testsuite/gcc.target/i386/pr103463-2.c b/gcc/testsuite/gcc.target/i386/pr103463-2.c
new file mode 100644
index 0000000..e1b2500
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr103463-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2 -fno-tree-bit-ccp" } */
+
+int foo_u64_1;
+unsigned __int128 foo_u128_1;
+
+void
+foo (void)
+{
+ foo_u128_1 <<= 127;
+ foo_u64_1 += __builtin_sub_overflow_p (0, (long) foo_u128_1, 0);
+ foo_u128_1 =
+ foo_u128_1 >> (foo_u128_1 & 127) | foo_u128_1 << (-foo_u128_1 & 127);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr103463.c b/gcc/testsuite/gcc.target/i386/pr103463.c
new file mode 100644
index 0000000..6cb8d3f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr103463.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-Os -fno-tree-dominator-opts -fno-tree-vrp" } */
+
+int bar0_u8_0, bar0_u16_0, bar0_u32_0, bar0_u16_1, bar0_u32_1;
+unsigned __int128 bar0_u128_0;
+
+int
+bar0() {
+ bar0_u16_1 *=
+ __builtin_add_overflow_p(bar0_u16_0, bar0_u32_1, (long)bar0_u8_0);
+ bar0_u128_0 = bar0_u128_0 >> bar0_u16_1 | bar0_u128_0 << (-bar0_u16_1 & 127);
+ bar0_u128_0 += __builtin_mul_overflow_p(bar0_u32_0, 20, 0);
+}