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| author | Kewen Lin <linkw@linux.ibm.com> | 2023-03-26 21:42:23 -0500 |
|---|---|---|
| committer | Kewen Lin <linkw@linux.ibm.com> | 2023-03-26 21:42:23 -0500 |
| commit | f33fc0775706e4db80d584c477608e28f4da0a6f (patch) | |
| tree | ba46658dc9c57c168bc1f4103a04bbce494b63e7 | |
| parent | 50a36a9541526708881f2ac0c4f180506bcf80bb (diff) | |
| download | gcc-f33fc0775706e4db80d584c477608e28f4da0a6f.zip gcc-f33fc0775706e4db80d584c477608e28f4da0a6f.tar.gz gcc-f33fc0775706e4db80d584c477608e28f4da0a6f.tar.bz2 | |
rs6000: Ensure vec_sld shift count in allowable range [PR109082]
As PR109082 shows, some uses of vec_sld in emmintrin.h don't
strictly guarantee the given shift count is in the range
0-15 (inclusive). This patch is to make the argument
range constraint honored for those uses.
PR target/109082
gcc/ChangeLog:
* config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
than zero when calling vec_sld.
(_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
zero when calling vec_sld.
(_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
than zero when calling vec_sld.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109082.c: New test.
| -rw-r--r-- | gcc/config/rs6000/emmintrin.h | 10 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr109082.c | 14 |
2 files changed, 21 insertions, 3 deletions
diff --git a/gcc/config/rs6000/emmintrin.h b/gcc/config/rs6000/emmintrin.h index f6a6dbf3..bfff7ff 100644 --- a/gcc/config/rs6000/emmintrin.h +++ b/gcc/config/rs6000/emmintrin.h @@ -1601,7 +1601,7 @@ _mm_bslli_si128 (__m128i __A, const int __N) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (__N < 16) + if (__N >= 0 && __N < 16) __result = vec_sld ((__v16qu) __A, __zeros, __N); else __result = __zeros; @@ -1615,7 +1615,9 @@ _mm_bsrli_si128 (__m128i __A, const int __N) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (__N < 16) + if (__N == 0) + return __A; + else if (__N > 0 && __N < 16) #ifdef __LITTLE_ENDIAN__ if (__builtin_constant_p(__N)) /* Would like to use Vector Shift Left Double by Octet @@ -1650,7 +1652,9 @@ _mm_slli_si128 (__m128i __A, const int _imm5) __v16qu __result; const __v16qu __zeros = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - if (_imm5 < 16) + if (_imm5 == 0) + return __A; + else if (_imm5 > 0 && _imm5 < 16) #ifdef __LITTLE_ENDIAN__ __result = vec_sld ((__v16qu) __A, __zeros, _imm5); #else diff --git a/gcc/testsuite/gcc.target/powerpc/pr109082.c b/gcc/testsuite/gcc.target/powerpc/pr109082.c new file mode 100644 index 0000000..ffa1c09 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109082.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mvsx" } */ + +/* Verify there is no warning message. */ + +#define NO_WARN_X86_INTRINSICS 1 +#include <emmintrin.h> + +__m128i +foo (__m128i A) +{ + return _mm_bsrli_si128 (A, 0); +} |