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authorJeff Law <jlaw@ventanamicro>2023-04-21 12:22:24 -0600
committerJeff Law <jlaw@ventanamicro>2023-04-21 12:24:16 -0600
commitf1f18198b069f461155191ecba41bc87bf5689dd (patch)
tree55fe6433edb991542902e05dd174c9ca72b55ca1
parent88195141aea9561b26a72023c446ce9c1151340e (diff)
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Adjust x86 testsuite for recent if-conversion cost checking
gcc/testsuite PR testsuite/109549 * gcc.target/i386/cmov6.c: No longer expect this test to generate 'cmov' instructions.
-rw-r--r--gcc/testsuite/gcc.target/i386/cmov6.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/i386/cmov6.c b/gcc/testsuite/gcc.target/i386/cmov6.c
index 535326e..5111c8a 100644
--- a/gcc/testsuite/gcc.target/i386/cmov6.c
+++ b/gcc/testsuite/gcc.target/i386/cmov6.c
@@ -1,6 +1,9 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=k8" } */
-/* { dg-final { scan-assembler "cmov\[^6\]" } } */
+/* if-converting this sequence would require two cmov
+ instructions and seems to always cost more independent
+ of the TUNE_ONE_IF_CONV setting. */
+/* { dg-final { scan-assembler-not "cmov\[^6\]" } } */
/* Verify that blocks are converted to conditional moves. */
extern int bar (int, int);