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| author | Richard Stallman <rms@gnu.org> | 1992-07-23 06:07:10 +0000 |
|---|---|---|
| committer | Richard Stallman <rms@gnu.org> | 1992-07-23 06:07:10 +0000 |
| commit | eeab6966e930bc29f7f2a9a159f2e44dccd8979b (patch) | |
| tree | 2fca4847c3a334eab619cb75d33e6bbcb5316563 | |
| parent | 4e28fa00636ed24cf944791a2e2f256f5b976e05 (diff) | |
| download | gcc-eeab6966e930bc29f7f2a9a159f2e44dccd8979b.zip gcc-eeab6966e930bc29f7f2a9a159f2e44dccd8979b.tar.gz gcc-eeab6966e930bc29f7f2a9a159f2e44dccd8979b.tar.bz2 | |
(mulsi3_little, mulsi3_big): New define_expand patterns.
(mulsi3): Just use one of them.
From-SVN: r1668
| -rw-r--r-- | gcc/config/i860/i860.md | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/gcc/config/i860/i860.md b/gcc/config/i860/i860.md index ef15a40..6e510aa2 100644 --- a/gcc/config/i860/i860.md +++ b/gcc/config/i860/i860.md @@ -1699,6 +1699,37 @@ "" " { + if (WORDS_BIG_ENDIAN) + return gen_mulsi3_big (operands[0], operands[1], operands[2]); + else + return gen_mulsi3_little (operands[0], operands[1], operands[2]); +}") + +(define_expand "mulsi3_little" + [(set (subreg:SI (match_dup 4) 0) (match_operand:SI 1 "general_operand" "")) + (set (subreg:SI (match_dup 5) 0) (match_operand:SI 2 "general_operand" "")) + (clobber (match_dup 3)) + (set (subreg:SI (match_dup 3) 0) + (mult:SI (subreg:SI (match_dup 4) 0) (subreg:SI (match_dup 5) 0))) + (set (match_operand:SI 0 "register_operand" "") (subreg:SI (match_dup 3) 0))] + "! WORDS_BIG_ENDIAN" + " +{ + operands[3] = gen_reg_rtx (DImode); + operands[4] = gen_reg_rtx (DImode); + operands[5] = gen_reg_rtx (DImode); +}") + +(define_expand "mulsi3_big" + [(set (subreg:SI (match_dup 4) 1) (match_operand:SI 1 "general_operand" "")) + (set (subreg:SI (match_dup 5) 1) (match_operand:SI 2 "general_operand" "")) + (clobber (match_dup 3)) + (set (subreg:SI (match_dup 3) 0) + (mult:SI (subreg:SI (match_dup 4) 0) (subreg:SI (match_dup 5) 0))) + (set (match_operand:SI 0 "register_operand" "") (subreg:SI (match_dup 3) 0))] + "WORDS_BIG_ENDIAN" + " +{ operands[3] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode); operands[5] = gen_reg_rtx (DImode); |