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| author | David Edelsohn <dje.gcc@gmail.com> | 2016-02-23 22:28:23 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2016-02-23 17:28:23 -0500 |
| commit | edd65746c54c396b383e1e7a7e5b47641a346294 (patch) | |
| tree | aeb1dad10c0d5241fe980e1022e3bc4ceb0b43e6 | |
| parent | 25cc21998e546c9a84df754d428c61f79bd89cd6 (diff) | |
| download | gcc-edd65746c54c396b383e1e7a7e5b47641a346294.zip gcc-edd65746c54c396b383e1e7a7e5b47641a346294.tar.gz gcc-edd65746c54c396b383e1e7a7e5b47641a346294.tar.bz2 | |
re PR target/69810 (PowerPC64: unrecognizable insn)
PR target/69810
* config/rs6000/rs6000.md (zero_extendqi<mode>2_dot): Convert from
define_insn_and_split to define_insn.
(zero_extendqi<mode>2_dot2): Same.
(extendqi<mode>2_dot): Same.
(extendqi<mode>2_dot2): Same.
From-SVN: r233648
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 44 |
2 files changed, 17 insertions, 36 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 07b50b5..0ba100d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-02-23 David Edelsohn <dje.gcc@gmail.com> + + PR target/69810 + * config/rs6000/rs6000.md (zero_extendqi<mode>2_dot): Convert from + define_insn_and_split to define_insn. + (zero_extendqi<mode>2_dot2): Same. + (extendqi<mode>2_dot): Same. + (extendqi<mode>2_dot2): Same. + 2016-02-23 Evandro Menezes <e.menezes@samsung.com> * config/arm/exynos-m1.md: Change cost of STP, fix bypass for stores diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 365bc5e..0299a00 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -701,7 +701,7 @@ rlwinm %0,%1,0,0xff" [(set_attr "type" "load,shift")]) -(define_insn_and_split "*zero_extendqi<mode>2_dot" +(define_insn "*zero_extendqi<mode>2_dot" [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y") (compare:CC (zero_extend:EXTQI (match_operand:QI 1 "gpc_reg_operand" "r,r")) (const_int 0))) @@ -709,19 +709,12 @@ "rs6000_gen_cell_microcode" "@ andi. %0,%1,0xff - #" - "&& reload_completed && cc_reg_not_cr0_operand (operands[2], CCmode)" - [(set (match_dup 0) - (zero_extend:EXTQI (match_dup 1))) - (set (match_dup 2) - (compare:CC (match_dup 0) - (const_int 0)))] - "" + rlwinm %0,%1,0,0xff\;cmpwi %2,%0,0" [(set_attr "type" "logical") (set_attr "dot" "yes") (set_attr "length" "4,8")]) -(define_insn_and_split "*zero_extendqi<mode>2_dot2" +(define_insn "*zero_extendqi<mode>2_dot2" [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y") (compare:CC (zero_extend:EXTQI (match_operand:QI 1 "gpc_reg_operand" "r,r")) (const_int 0))) @@ -730,14 +723,7 @@ "rs6000_gen_cell_microcode" "@ andi. %0,%1,0xff - #" - "&& reload_completed && cc_reg_not_cr0_operand (operands[2], CCmode)" - [(set (match_dup 0) - (zero_extend:EXTQI (match_dup 1))) - (set (match_dup 2) - (compare:CC (match_dup 0) - (const_int 0)))] - "" + rlwinm %0,%1,0,0xff\;cmpwi %2,%0,0" [(set_attr "type" "logical") (set_attr "dot" "yes") (set_attr "length" "4,8")]) @@ -855,7 +841,7 @@ "extsb %0,%1" [(set_attr "type" "exts")]) -(define_insn_and_split "*extendqi<mode>2_dot" +(define_insn "*extendqi<mode>2_dot" [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y") (compare:CC (sign_extend:EXTQI (match_operand:QI 1 "gpc_reg_operand" "r,r")) (const_int 0))) @@ -863,19 +849,12 @@ "rs6000_gen_cell_microcode" "@ extsb. %0,%1 - #" - "&& reload_completed && cc_reg_not_cr0_operand (operands[2], CCmode)" - [(set (match_dup 0) - (sign_extend:EXTQI (match_dup 1))) - (set (match_dup 2) - (compare:CC (match_dup 0) - (const_int 0)))] - "" + extsb %0,%1\;cmpwi %2,%0,0" [(set_attr "type" "exts") (set_attr "dot" "yes") (set_attr "length" "4,8")]) -(define_insn_and_split "*extendqi<mode>2_dot2" +(define_insn "*extendqi<mode>2_dot2" [(set (match_operand:CC 2 "cc_reg_operand" "=x,?y") (compare:CC (sign_extend:EXTQI (match_operand:QI 1 "gpc_reg_operand" "r,r")) (const_int 0))) @@ -884,14 +863,7 @@ "rs6000_gen_cell_microcode" "@ extsb. %0,%1 - #" - "&& reload_completed && cc_reg_not_cr0_operand (operands[2], CCmode)" - [(set (match_dup 0) - (sign_extend:EXTQI (match_dup 1))) - (set (match_dup 2) - (compare:CC (match_dup 0) - (const_int 0)))] - "" + extsb %0,%1\;cmpwi %2,%0,0" [(set_attr "type" "exts") (set_attr "dot" "yes") (set_attr "length" "4,8")]) |