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| author | Christophe Lyon <christophe.lyon@arm.com> | 2023-02-21 11:42:41 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@arm.com> | 2023-05-11 10:25:10 +0200 |
| commit | eb1ded464f339b498d487dd846dfa674884c8e6e (patch) | |
| tree | f4f9bd4f7edb96a00cd46c5ad700ae10f7234921 | |
| parent | fbcb43fa0b254cac50fb7857de2834bcfca075ed (diff) | |
| download | gcc-eb1ded464f339b498d487dd846dfa674884c8e6e.zip gcc-eb1ded464f339b498d487dd846dfa674884c8e6e.tar.gz gcc-eb1ded464f339b498d487dd846dfa674884c8e6e.tar.bz2 | |
arm: [MVE intrinsics] factorize vaddvq
Factorize vaddvq builtins so that they use parameterized names.
2022-10-25 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (mve_insn): Add vaddv.
* config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vaddvq_p_<supf><mode>): Rename into ...
(@mve_<mve_insn>q_p_<supf><mode>): ... this.
* config/arm/vec-common.md: Use gen_mve_q instead of
gen_mve_vaddvq.
| -rw-r--r-- | gcc/config/arm/iterators.md | 2 | ||||
| -rw-r--r-- | gcc/config/arm/mve.md | 8 | ||||
| -rw-r--r-- | gcc/config/arm/vec-common.md | 2 |
3 files changed, 7 insertions, 5 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index aff4e7f..46c7dde 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -762,6 +762,8 @@ (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd") (VADDQ_M_S "vadd") (VADDQ_M_U "vadd") (VADDQ_M_F "vadd") (VADDQ_N_S "vadd") (VADDQ_N_U "vadd") (VADDQ_N_F "vadd") + (VADDVQ_P_S "vaddv") (VADDVQ_P_U "vaddv") + (VADDVQ_S "vaddv") (VADDVQ_U "vaddv") (VANDQ_M_S "vand") (VANDQ_M_U "vand") (VANDQ_M_F "vand") (VBICQ_M_N_S "vbic") (VBICQ_M_N_U "vbic") (VBICQ_M_S "vbic") (VBICQ_M_U "vbic") (VBICQ_M_F "vbic") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 0c4e4e6..d772f4d 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -360,14 +360,14 @@ ;; ;; [vaddvq_s, vaddvq_u]) ;; -(define_insn "@mve_vaddvq_<supf><mode>" +(define_insn "@mve_<mve_insn>q_<supf><mode>" [ (set (match_operand:SI 0 "s_register_operand" "=Te") (unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w")] VADDVQ)) ] "TARGET_HAVE_MVE" - "vaddv.<supf>%#<V_sz_elem>\t%0, %q1" + "<mve_insn>.<supf>%#<V_sz_elem>\t%0, %q1" [(set_attr "type" "mve_move") ]) @@ -773,7 +773,7 @@ ;; ;; [vaddvq_p_u, vaddvq_p_s]) ;; -(define_insn "mve_vaddvq_p_<supf><mode>" +(define_insn "@mve_<mve_insn>q_p_<supf><mode>" [ (set (match_operand:SI 0 "s_register_operand" "=Te") (unspec:SI [(match_operand:MVE_2 1 "s_register_operand" "w") @@ -781,7 +781,7 @@ VADDVQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddvt.<supf>%#<V_sz_elem> %0, %q1" + "vpst\;<mve_insn>t.<supf>%#<V_sz_elem>\t%0, %q1" [(set_attr "type" "mve_move") (set_attr "length""8")]) diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index 6183c93..9af8429 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -559,7 +559,7 @@ /* vaddv generates a 32 bits accumulator. */ rtx op0 = gen_reg_rtx (SImode); - emit_insn (gen_mve_vaddvq (VADDVQ_S, <MODE>mode, op0, operands[1])); + emit_insn (gen_mve_q (VADDVQ_S, VADDVQ_S, <MODE>mode, op0, operands[1])); emit_move_insn (operands[0], gen_lowpart (<V_elem>mode, op0)); } |