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author | Andreas Krebbel <krebbel1@de.ibm.com> | 2004-09-20 17:25:39 +0000 |
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committer | Ulrich Weigand <uweigand@gcc.gnu.org> | 2004-09-20 17:25:39 +0000 |
commit | ea5062978941d6157696c0d23b18b4342e747aca (patch) | |
tree | 55ed6551a46e0699037e3bcf5ed66b3148d33a8d | |
parent | da89fba81fb25d870e75ebf454862752a8562f4c (diff) | |
download | gcc-ea5062978941d6157696c0d23b18b4342e747aca.zip gcc-ea5062978941d6157696c0d23b18b4342e747aca.tar.gz gcc-ea5062978941d6157696c0d23b18b4342e747aca.tar.bz2 |
s390.c (s390_frame_info): Added alignment statement for floating point register area on stack.
2004-09-20 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.c (s390_frame_info): Added alignment statement for
floating point register area on stack.
From-SVN: r87765
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/s390/s390.c | 20 |
2 files changed, 23 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ec5ed79..39dc5aa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-09-20 Andreas Krebbel <krebbel1@de.ibm.com> + + * config/s390/s390.c (s390_frame_info): Added alignment statement for + floating point register area on stack. + 2004-09-20 Jakub Jelinek <jakub@redhat.com> * predict.c (expr_expected_value): Use *_CLASS_P macros. diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index f59317a..2dd515b 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -5958,8 +5958,11 @@ s390_frame_info (int base_used, int return_addr_used) } else { + /* On 31 bit we have to care about alignment of the + floating point regs to provide fastest access. */ cfun_frame_layout.f0_offset - = (cfun_frame_layout.gprs_offset + = ((cfun_frame_layout.gprs_offset + & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1)) - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1))); cfun_frame_layout.f4_offset @@ -5996,7 +5999,9 @@ s390_frame_info (int base_used, int return_addr_used) { cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p * UNITS_PER_WORD); - + + /* No alignment trouble here because f8-f15 are only saved under + 64 bit. */ cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset, cfun_frame_layout.f4_offset), cfun_frame_layout.gprs_offset) @@ -6009,6 +6014,9 @@ s390_frame_info (int base_used, int return_addr_used) cfun_frame_layout.frame_size += 8; cfun_frame_layout.frame_size += cfun_gprs_save_area_size; + + /* If under 31 bit an odd number of gprs has to be saved we have to adjust + the frame size to sustain 8 byte alignment of stack frames. */ cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size + STACK_BOUNDARY / BITS_PER_UNIT - 1) & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1)); @@ -7150,6 +7158,10 @@ s390_gimplify_va_arg (tree valist, tree type, tree *pre_p, indirect_p = 1; reg = gpr; n_reg = 1; + + /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding + will be added by s390_frame_info because for va_args always an even + number of gprs has to be saved r15-r2 = 14 regs. */ sav_ofs = (TARGET_KERNEL_BACKCHAIN ? (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD); sav_scale = UNITS_PER_WORD; @@ -7185,6 +7197,10 @@ s390_gimplify_va_arg (tree valist, tree type, tree *pre_p, indirect_p = 0; reg = gpr; n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + + /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding + will be added by s390_frame_info because for va_args always an even + number of gprs has to be saved r15-r2 = 14 regs. */ sav_ofs = TARGET_KERNEL_BACKCHAIN ? (TARGET_64BIT ? 4 : 2) * 8 : 2*UNITS_PER_WORD; |