diff options
| author | Jan Hubicka <jh@suse.cz> | 2002-02-18 15:09:39 +0100 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2002-02-18 14:09:39 +0000 |
| commit | e95d6b23ae65e724b4e03b415cae12d3be49c10c (patch) | |
| tree | 5e6c061310f2338e72556405442cd4ea0b799fc6 | |
| parent | 605e15f7914f6434612cd1cad0fe80b026d7b312 (diff) | |
| download | gcc-e95d6b23ae65e724b4e03b415cae12d3be49c10c.zip gcc-e95d6b23ae65e724b4e03b415cae12d3be49c10c.tar.gz gcc-e95d6b23ae65e724b4e03b415cae12d3be49c10c.tar.bz2 | |
i386.c (classify_argument): Properly classify SSE/MMX modes and VOIDmode.
* i386.c (classify_argument): Properly classify SSE/MMX modes and VOIDmode.
(construct_container): Fix handling of SSE operands.
(ix86_expand_builtin): Fix handling of 64bit pointers.
(mmx_maskmovq_rex): New pattern.
From-SVN: r49840
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 16 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 11 |
3 files changed, 31 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6ccade1..9ae406e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +Mon Feb 18 15:07:35 CET 2002 Jan Hubicka <jh@suse.cz> + + * i386.c (classify_argument): Properly classify SSE/MMX modes and VOIDmode. + (construct_container): Fix handling of SSE operands. + (ix86_expand_builtin): Fix handling of 64bit pointers. + (mmx_maskmovq_rex): New pattern. + Mon Feb 18 11:55:55 CET 2002 Jan Hubicka <jh@suse.cz> * regrename.c (kill_set_value): Handle subregs properly. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 23bb34e..342321a 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1819,7 +1819,19 @@ classify_argument (mode, type, classes, bit_offset) case SCmode: classes[0] = X86_64_SSE_CLASS; return 1; + case V4SFmode: + case V4SImode: + classes[0] = X86_64_SSE_CLASS; + classes[1] = X86_64_SSEUP_CLASS; + return 2; + case V2SFmode: + case V2SImode: + case V4HImode: + case V8QImode: + classes[0] = X86_64_SSE_CLASS; + return 1; case BLKmode: + case VOIDmode: return 0; default: abort (); @@ -1932,7 +1944,7 @@ construct_container (mode, type, in_return, nintregs, nsseregs, intreg, sse_regn abort (); } if (n == 2 && class[0] == X86_64_SSE_CLASS && class[1] == X86_64_SSEUP_CLASS) - return gen_rtx_REG (TImode, SSE_REGNO (sse_regno)); + return gen_rtx_REG (mode, SSE_REGNO (sse_regno)); if (n == 2 && class[0] == X86_64_X87_CLASS && class[1] == X86_64_X87UP_CLASS) return gen_rtx_REG (TFmode, FIRST_STACK_REG); @@ -11689,7 +11701,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore) return target; case IX86_BUILTIN_MASKMOVQ: - icode = CODE_FOR_mmx_maskmovq; + icode = TARGET_64BIT ? CODE_FOR_mmx_maskmovq_rex : CODE_FOR_mmx_maskmovq; /* Note the arg order is different from the operand order. */ arg1 = TREE_VALUE (arglist); arg2 = TREE_VALUE (TREE_CHAIN (arglist)); diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index cdacbbd..b0ec9f2 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18092,7 +18092,16 @@ [(set (mem:V8QI (match_operand:SI 0 "register_operand" "D")) (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y") (match_operand:V8QI 2 "register_operand" "y")] 32))] - "TARGET_SSE || TARGET_3DNOW_A" + "(TARGET_SSE || TARGET_3DNOW_A) && !TARGET_64BIT" + ;; @@@ check ordering of operands in intel/nonintel syntax + "maskmovq\t{%2, %1|%1, %2}" + [(set_attr "type" "sse")]) + +(define_insn "mmx_maskmovq_rex" + [(set (mem:V8QI (match_operand:DI 0 "register_operand" "D")) + (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y") + (match_operand:V8QI 2 "register_operand" "y")] 32))] + "(TARGET_SSE || TARGET_3DNOW_A) && TARGET_64BIT" ;; @@@ check ordering of operands in intel/nonintel syntax "maskmovq\t{%2, %1|%1, %2}" [(set_attr "type" "sse")]) |