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| author | Hans-Peter Nilsson <hp@axis.com> | 2004-09-23 21:59:13 +0000 |
|---|---|---|
| committer | Hans-Peter Nilsson <hp@gcc.gnu.org> | 2004-09-23 21:59:13 +0000 |
| commit | e758023dab54625ad05875ce5c61d76a8b8a531d (patch) | |
| tree | bd2bf9c3bdbdae642aa7611c56719cd5fc1206da | |
| parent | 3d295b3a830ba0ba186df93b2460433623325bd6 (diff) | |
| download | gcc-e758023dab54625ad05875ce5c61d76a8b8a531d.zip gcc-e758023dab54625ad05875ce5c61d76a8b8a531d.tar.gz gcc-e758023dab54625ad05875ce5c61d76a8b8a531d.tar.bz2 | |
re PR target/17626 (Recent peephole2:s may cause internal compiler errors)
PR target/17626
* config/cris/cris.md (moverside, movemside): Rename variable
"reg" to "otherop". To generate canonical RTX, check that otherop
isn't constant instead of checking that operand 1 is a register.
From-SVN: r87988
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/cris/cris.md | 20 |
2 files changed, 19 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4eeefe8..1d77339 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-09-23 Hans-Peter Nilsson <hp@axis.com> + + PR target/17626 + * config/cris/cris.md (moverside, movemside): Rename variable + "reg" to "otherop". To generate canonical RTX, check that otherop + isn't constant instead of checking that operand 1 is a register. + 2004-09-23 Jakub Jelinek <jakub@redhat.com> * tree-ssa-propagate.c (set_rhs): Fail if EXPR is COMPOUND_EXPR. diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index be137a5..6092d24 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -4901,17 +4901,19 @@ [(set (match_dup 4) (match_dup 6)) (set (match_dup 0) (plus:SI (match_dup 7) (match_dup 8)))])] { - rtx reg + rtx otherop = rtx_equal_p (operands[2], operands[0]) ? operands[3] : operands[2]; - if (REG_S_P (operands[1])) + /* Make sure we have canonical RTX so we match the insn pattern - a + register or MULT in the first operand, not a constant. */ + if (CONSTANT_P (otherop)) { operands[7] = operands[1]; - operands[8] = reg; + operands[8] = otherop; } else { - operands[7] = reg; + operands[7] = otherop; operands[8] = operands[1]; } operands[6] @@ -4949,17 +4951,19 @@ [(set (match_dup 6) (match_dup 5)) (set (match_dup 0) (plus:SI (match_dup 7) (match_dup 8)))])] { - rtx reg + rtx otherop = rtx_equal_p (operands[2], operands[0]) ? operands[3] : operands[2]; - if (REG_S_P (operands[1])) + /* Make sure we have canonical RTX so we match the insn pattern - a + register or MULT in the first operand, not a constant. */ + if (CONSTANT_P (otherop)) { operands[7] = operands[1]; - operands[8] = reg; + operands[8] = otherop; } else { - operands[7] = reg; + operands[7] = otherop; operands[8] = operands[1]; } operands[6] |