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| author | Jeff Law <law@gcc.gnu.org> | 1993-02-21 11:10:37 -0700 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1993-02-21 11:10:37 -0700 |
| commit | e53bfc4bb645c747242a8d5d51960acc7b509946 (patch) | |
| tree | e0f68e09a5d658d0a96313dadc7a2f7ded08e219 | |
| parent | 99efce9d6b241ddc77487a1a499e882c5e4e3fce (diff) | |
| download | gcc-e53bfc4bb645c747242a8d5d51960acc7b509946.zip gcc-e53bfc4bb645c747242a8d5d51960acc7b509946.tar.gz gcc-e53bfc4bb645c747242a8d5d51960acc7b509946.tar.bz2 | |
* pa.md (load high pattern): Rework constraints to reduce %r1 spillage.
From-SVN: r3510
| -rw-r--r-- | gcc/config/pa/pa.md | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index d780323..39d7834 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -934,8 +934,20 @@ ;; For all symbolic operands *except* function addresses and read-only ;; operands (which live in TEXT space and do not require relocation). +;; +;; The constraints are a little strange. +;; The basic idea is to prefer %r1 as much as possible for register +;; allocation (hence we do not allow regclass to know about the general +;; register case (via *r). +;; We also want to avoid spilling %r1 as that will cause every use +;; of %r1 to be reloaded, so we make the %r1 case very expensive +;; as far as reload is concerned (via !a). +;; +;; The real solution is to not spill all pseudos allocated to %r1 +;; when %r1 is needed as a spill register, but that is considerably +;; more difficult than coercing decent behavior via constraints. (define_insn "" - [(set (match_operand:SI 0 "register_operand" "=a,!*r") + [(set (match_operand:SI 0 "register_operand" "=!a,*r") (high:SI (match_operand 1 "" "")))] "! TARGET_KERNEL && symbolic_operand(operands[1], Pmode) && ! function_label_operand (operands[1]) |