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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-09-10 22:07:10 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-09-11 07:00:49 +0800 |
| commit | e390872aebcfebb7c9bc95d8fb7e44f2bec996d3 (patch) | |
| tree | cb85a1f6c391c688e9da4f51e0e78716c66b2031 | |
| parent | 30e6ee074588bacefd2dfe745b188bb20c81fe5e (diff) | |
| download | gcc-e390872aebcfebb7c9bc95d8fb7e44f2bec996d3.zip gcc-e390872aebcfebb7c9bc95d8fb7e44f2bec996d3.tar.gz gcc-e390872aebcfebb7c9bc95d8fb7e44f2bec996d3.tar.bz2 | |
RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
gcc/ChangeLog:
* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
| -rw-r--r-- | gcc/config/riscv/riscv-v.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 1ca3f1d..8a548f5 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -2647,7 +2647,8 @@ shuffle_compress_patterns (struct expand_vec_perm_d *d) For index = { 0, 2, 5, 6}, we need to slide op1 up before we apply compress approach. */ - bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1); + bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1) + && !const_vec_duplicate_p (d->op1); /* If we leave it directly be handled by general gather, the code sequence will be: |