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| author | Michael Meissner <meissner@gcc.gnu.org> | 1995-03-09 17:51:37 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 1995-03-09 17:51:37 +0000 |
| commit | e2041e684f68944f31b8724fbeca1653729db857 (patch) | |
| tree | 594c62a000d9a5ff33d76fed0f01aac2b368dd80 | |
| parent | a74853cb655fee7f6fccc2a76c0b4914d2f28e23 (diff) | |
| download | gcc-e2041e684f68944f31b8724fbeca1653729db857.zip gcc-e2041e684f68944f31b8724fbeca1653729db857.tar.gz gcc-e2041e684f68944f31b8724fbeca1653729db857.tar.bz2 | |
Fix -msoft-float on Power.
From-SVN: r9144
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index ae27254..170ae1c 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3895,7 +3895,7 @@ /* If operands[1] is a register, it may have double-precision data in it, so truncate it to single precision. We need not do this for POWERPC. */ - if (! TARGET_POWERPC && GET_CODE (operands[1]) == REG) + if (! TARGET_POWERPC && TARGET_HARD_FLOAT && GET_CODE (operands[1]) == REG) { rtx newreg = reload_in_progress ? operands[1] : gen_reg_rtx (SFmode); emit_insn (gen_truncdfsf2 (newreg, |