diff options
| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-09-09 12:30:26 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-09-09 12:32:49 +0800 |
| commit | df9a25384e6c484643b48b59b4e6e07504889b61 (patch) | |
| tree | d7c62fa1e2c8f72ac062fff097f9d08b2ba084a2 | |
| parent | 7547f65f60c0bbf8de704c569c92c7a0e31a6175 (diff) | |
| download | gcc-df9a25384e6c484643b48b59b4e6e07504889b61.zip gcc-df9a25384e6c484643b48b59b4e6e07504889b61.tar.gz gcc-df9a25384e6c484643b48b59b4e6e07504889b61.tar.bz2 | |
RISC-V: Fix VLS floating-point operations predicate
VLS vfadd should depend on ZVFH instead of ZVFHMIN.
Obvious fix and committed.
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Fix floating-point operations predicate.
| -rw-r--r-- | gcc/config/riscv/vector-iterators.md | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 7d9fcd2..a98ed9f 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -456,18 +456,18 @@ (RVVM8DF "TARGET_VECTOR_ELEN_FP_64") (RVVM4DF "TARGET_VECTOR_ELEN_FP_64") (RVVM2DF "TARGET_VECTOR_ELEN_FP_64") (RVVM1DF "TARGET_VECTOR_ELEN_FP_64") - (V1HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") - (V2HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") - (V4HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") - (V8HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") - (V16HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16") - (V32HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64") - (V64HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128") - (V128HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256") - (V256HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512") - (V512HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024") - (V1024HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048") - (V2048HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096") + (V1HF "TARGET_VECTOR_VLS && TARGET_ZVFH") + (V2HF "TARGET_VECTOR_VLS && TARGET_ZVFH") + (V4HF "TARGET_VECTOR_VLS && TARGET_ZVFH") + (V8HF "TARGET_VECTOR_VLS && TARGET_ZVFH") + (V16HF "TARGET_VECTOR_VLS && TARGET_ZVFH") + (V32HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 64") + (V64HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 128") + (V128HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 256") + (V256HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 512") + (V512HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024") + (V1024HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048") + (V2048HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096") (V1SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") (V2SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") (V4SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32") |