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author | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2017-03-09 07:53:29 +0000 |
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committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2017-03-09 07:53:29 +0000 |
commit | dd01cd0ca29b687337661abd9870c32a287de94b (patch) | |
tree | 21e0790cf251fd99f89fb3fe2ad5e3c6c22da1a9 | |
parent | 89262ec6bdb835436ecfa715397bae078035fe9e (diff) | |
download | gcc-dd01cd0ca29b687337661abd9870c32a287de94b.zip gcc-dd01cd0ca29b687337661abd9870c32a287de94b.tar.gz gcc-dd01cd0ca29b687337661abd9870c32a287de94b.tar.bz2 |
S/390: Add missing constraints in builtin patterns
gcc/ChangeLog:
2017-03-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vx-builtins.md ("vfee<mode>", "vfeez<mode>")
("vfenez<mode>"): Add missing constraints.
From-SVN: r245987
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/s390/vx-builtins.md | 18 |
2 files changed, 14 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3f97e16..de662f1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-03-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + + * config/s390/vx-builtins.md ("vfee<mode>", "vfeez<mode>") + ("vfenez<mode>"): Add missing constraints. + 2017-03-08 Martin Sebor <msebor@redhat.com> PR target/79928 diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 1e9010a..6aff378 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -1351,9 +1351,9 @@ ; vfeeb, vfeeh, vfeef (define_insn "vfee<mode>" - [(set (match_operand:VI_HW_QHS 0 "register_operand" "") - (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "") - (match_operand:VI_HW_QHS 2 "register_operand" "") + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") (const_int 0)] UNSPEC_VEC_VFEE))] "TARGET_VX" @@ -1362,9 +1362,9 @@ ; vfeezb, vfeezh, vfeezf (define_insn "vfeez<mode>" - [(set (match_operand:VI_HW_QHS 0 "register_operand" "") - (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "") - (match_operand:VI_HW_QHS 2 "register_operand" "") + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") (const_int VSTRING_FLAG_ZS)] UNSPEC_VEC_VFEE))] "TARGET_VX" @@ -1423,9 +1423,9 @@ ; vfenezb, vfenezh, vfenezf (define_insn "vfenez<mode>" - [(set (match_operand:VI_HW_QHS 0 "register_operand" "") - (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "") - (match_operand:VI_HW_QHS 2 "register_operand" "") + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") (const_int VSTRING_FLAG_ZS)] UNSPEC_VEC_VFENE))] "TARGET_VX" |