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authorRichard Sandiford <richard.sandiford@arm.com>2023-01-27 17:04:28 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2023-01-27 17:04:28 +0000
commitdc19993bb9e83e9c67c3027c38e09f7bcf12e887 (patch)
tree9d12fd2101abd51a095889ec0275e8275649e566
parent7486fe153adaa868f36248b72f3e78d18b1b3ba1 (diff)
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aarch64: Prevent simd tests from being optimised away
The vqdml[as]l[hs]_laneq_* tests were folded at compile time, meaning that we didn't have any Advanced SIMD instructions in the assembly. Kyrill's preference was to use wrapper functions, so this patch does that for the failing tests and for others that had scan-assemblers with inline intrinsics calls. (There were some tests that already used wrapper functions, some that used volatile, some that used inline asm barriers, and some that had no separation.) Doing that for vqdmulhs_lane_s32.c meant that we generated the scalar form of the instruction, rather than a vector instruction operating on lane 0. That seems fair enough, so the patch keeps that test but adds a second one for lane 1. gcc/testsuite/ * gcc.target/aarch64/simd/vfma_f64.c: Use a wrapper function rather than an asm barrier. * gcc.target/aarch64/simd/vfms_f64.c: Likewise. * gcc.target/aarch64/simd/vmul_f64_1.c: Use a wrapper function rather than volatile. * gcc.target/aarch64/simd/vmul_n_f64_1.c: Likewise. * gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c: Use a wrapper function. Remove -fno-inline. * gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c: Likewise. * gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c: Likewise. * gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c: Likewise. * gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: Likewise. * gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c: Likewise. * gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c: Likewise. * gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise. * gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c: Likewise. * gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise. * gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c: Likewise. * gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise. Allow the scalar form to be used when operating on lane 0. Add a test for lane 1.
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c27
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c27
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c12
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vmul_n_f64_1.c12
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c20
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c20
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c20
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c21
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c15
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c18
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c33
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c18
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c15
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c18
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c15
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c18
16 files changed, 163 insertions, 146 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c b/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c
index ef414f1..467c740 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c
@@ -7,33 +7,24 @@
#define EPS 1.0e-15
-#define INHIB_OPT(x) asm volatile ("mov %d0, %1.d[0]" \
- : "=w"(x) \
- : "w"(x) \
- : /* No clobbers. */);
-
extern void abort (void);
+float64_t __attribute__((noipa))
+test_vfma (float64x1_t arg1, float64x1_t arg2, float64x1_t arg3)
+{
+ return vget_lane_f64 (vfma_f64 (arg1, arg2, arg3), 0);
+}
+
int
main (void)
{
- float64x1_t arg1;
- float64x1_t arg2;
- float64x1_t arg3;
-
float64_t expected;
float64_t actual;
- arg1 = vcreate_f64 (0x3fe3955382d35b0eULL);
- arg2 = vcreate_f64 (0x3fa88480812d6670ULL);
- arg3 = vcreate_f64 (0x3fd5791ae2a92572ULL);
-
- INHIB_OPT (arg1);
- INHIB_OPT (arg2);
- INHIB_OPT (arg3);
-
expected = 0.6280448184360076;
- actual = vget_lane_f64 (vfma_f64 (arg1, arg2, arg3), 0);
+ actual = test_vfma (vcreate_f64 (0x3fe3955382d35b0eULL),
+ vcreate_f64 (0x3fa88480812d6670ULL),
+ vcreate_f64 (0x3fd5791ae2a92572ULL));
if (__builtin_fabs (expected - actual) > EPS)
abort ();
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c b/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c
index afbb8a8..af6ca6f 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c
@@ -7,33 +7,24 @@
#define EPS 1.0e-15
-#define INHIB_OPT(x) asm volatile ("mov %d0, %1.d[0]" \
- : "=w"(x) \
- : "w"(x) \
- : /* No clobbers. */);
-
extern void abort (void);
+float64_t __attribute__((noipa))
+test_vfms (float64x1_t arg1, float64x1_t arg2, float64x1_t arg3)
+{
+ return vget_lane_f64 (vfms_f64 (arg1, arg2, arg3), 0);
+}
+
int
main (void)
{
- float64x1_t arg1;
- float64x1_t arg2;
- float64x1_t arg3;
-
float64_t expected;
float64_t actual;
- arg1 = vcreate_f64 (0x3fe730af8db9e6f7ULL);
- arg2 = vcreate_f64 (0x3fe6b78680fa29ceULL);
- arg3 = vcreate_f64 (0x3feea3cbf921fbe0ULL);
-
- INHIB_OPT (arg1);
- INHIB_OPT (arg2);
- INHIB_OPT (arg3);
-
expected = 4.4964705746355915e-2;
- actual = vget_lane_f64 (vfms_f64 (arg1, arg2, arg3), 0);
+ actual = test_vfms (vcreate_f64 (0x3fe730af8db9e6f7ULL),
+ vcreate_f64 (0x3fe6b78680fa29ceULL),
+ vcreate_f64 (0x3feea3cbf921fbe0ULL));
if (__builtin_fabs (expected - actual) > EPS)
abort ();
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c
index c855c8c..dfa808c 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c
@@ -7,19 +7,23 @@
extern void abort (void);
+float64_t __attribute__((noipa))
+test_vmul (float64x1_t arg1, float64x1_t arg2)
+{
+ return vget_lane_f64 (vmul_f64 (arg1, arg2), 0);
+}
+
int
main (void)
{
- volatile float64_t minus_e, pi;
+ float64_t minus_e, pi;
float64_t expected, actual;
pi = 3.14159265359;
minus_e = -2.71828;
expected = pi * minus_e;
-
- actual = vget_lane_f64 (vmul_f64 ((float64x1_t) { pi },
- (float64x1_t) { minus_e }), 0);
+ actual = test_vmul ((float64x1_t) { pi }, (float64x1_t) { minus_e });
if (expected != actual)
abort ();
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vmul_n_f64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vmul_n_f64_1.c
index f8f3cd2..91c12bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vmul_n_f64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vmul_n_f64_1.c
@@ -7,19 +7,23 @@
extern void abort (void);
+float64_t __attribute__((noipa))
+test_vmul (float64x1_t arg1, float64_t arg2)
+{
+ return vget_lane_f64 (vmul_n_f64 (arg1, arg2), 0);
+}
+
int
main (void)
{
- volatile float64_t minus_e, pi;
+ float64_t minus_e, pi;
float64_t expected, actual;
pi = 3.14159265359;
minus_e = -2.71828;
expected = pi * minus_e;
-
- actual = vget_lane_f64 (vmul_n_f64 ((float64x1_t) { pi },
- minus_e), 0);
+ actual = test_vmul ((float64x1_t) { pi }, minus_e);
if (expected != actual)
abort ();
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c
index 9a9bd0d..aa6b89a 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c
@@ -1,27 +1,27 @@
/* Test the vqdmlalh_laneq_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqdmlalh (int32_t arg1, int16_t arg2, int16x8_t arg3)
+{
+ return vqdmlalh_laneq_s16 (arg1, arg2, arg3, 7);
+}
+
int
main (void)
{
- int32_t arg1;
- int16_t arg2;
- int16x8_t arg3;
int32_t actual;
int32_t expected;
- arg1 = 0x80000000;
- arg2 = -24497;
- arg3 = vcombine_s16 (vcreate_s16 (0x008a80007fff7fffULL),
- vcreate_s16 (0xfffffa797fff8000ULL));
-
- actual = vqdmlalh_laneq_s16 (arg1, arg2, arg3, 7);
+ actual = test_vqdmlalh (0x80000000, -24497,
+ vcombine_s16 (vcreate_s16 (0x008a80007fff7fffULL),
+ vcreate_s16 (0xfffffa797fff8000ULL)));
expected = -2147434654;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c
index 0dbe339..ea39595 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c
@@ -1,27 +1,27 @@
/* Test the vqdmlals_laneq_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int64_t __attribute__((noipa))
+test_vqdmlals (int64_t arg1, int32_t arg2, int32x4_t arg3)
+{
+ return vqdmlals_laneq_s32 (arg1, arg2, arg3, 3);
+}
+
int
main (void)
{
- int64_t arg1;
- int32_t arg2;
- int32x4_t arg3;
int64_t actual;
int64_t expected;
- arg1 = -9223182289494545592LL;
- arg2 = 32768;
- arg3 = vcombine_s32 (vcreate_s32 (0xffff7fff8000ffffULL),
- vcreate_s32 (0x80000000ffff0000ULL));
-
- actual = vqdmlals_laneq_s32 (arg1, arg2, arg3, 3);
+ actual = test_vqdmlals (-9223182289494545592LL, 32768,
+ vcombine_s32 (vcreate_s32 (0xffff7fff8000ffffULL),
+ vcreate_s32 (0x80000000ffff0000ULL)));
expected = -9223323026982900920LL;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c
index 2763e06..0f1babc 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c
@@ -1,27 +1,27 @@
/* Test the vqdmlslh_laneq_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqdmlslh (int32_t arg1, int16_t arg2, int16x8_t arg3)
+{
+ return vqdmlslh_laneq_s16 (arg1, arg2, arg3, 4);
+}
+
int
main (void)
{
- int32_t arg1;
- int16_t arg2;
- int16x8_t arg3;
int32_t actual;
int32_t expected;
- arg1 = -2147450881;
- arg2 = 32767;
- arg3 = vcombine_s16 (vcreate_s16 (0x359d7fff00007fffULL),
- vcreate_s16 (0xe678ffff00008000ULL));
-
- actual = vqdmlslh_laneq_s16 (arg1, arg2, arg3, 4);
+ actual = test_vqdmlslh (-2147450881, 32767,
+ vcombine_s16 (vcreate_s16 (0x359d7fff00007fffULL),
+ vcreate_s16 (0xe678ffff00008000ULL)));
expected = -32769;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c
index e003adb..ff92254 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c
@@ -1,28 +1,27 @@
/* Test the vqdmlsls_laneq_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int64_t __attribute__((noipa))
+test_vqdmlsls (int64_t arg1, int32_t arg2, int32x4_t arg3)
+{
+ return vqdmlsls_laneq_s32 (arg1, arg2, arg3, 3);
+}
+
int
main (void)
{
- int64_t arg1;
- int32_t arg2;
- int32x4_t arg3;
int64_t actual;
int64_t expected;
- arg1 = 140733193453567LL;
- arg2 = 25544;
- arg3 = vcombine_s32 (vcreate_s32 (0x417b8000ffff8397LL),
- vcreate_s32 (0x7fffffff58488000LL));
-
-
- actual = vqdmlsls_laneq_s32 (arg1, arg2, arg3, 3);
+ actual = test_vqdmlsls (140733193453567LL, 25544,
+ vcombine_s32 (vcreate_s32 (0x417b8000ffff8397LL),
+ vcreate_s32 (0x7fffffff58488000LL)));
expected = 31022548895631LL;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c
index 75f6770..12b7971 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c
@@ -1,25 +1,26 @@
/* Test the vqdmulhh_lane_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#include <stdio.h>
extern void abort (void);
+int16_t __attribute__((noipa))
+test_vqdmulhh (int16_t arg1, int16x4_t arg2)
+{
+ return vqdmulhh_lane_s16 (arg1, arg2, 2);
+}
+
int
main (void)
{
- int16_t arg1;
- int16x4_t arg2;
- int16_t result;
int16_t actual;
int16_t expected;
- arg1 = -32768;
- arg2 = vcreate_s16 (0x0000ffff2489e398ULL);
- actual = vqdmulhh_lane_s16 (arg1, arg2, 2);
+ actual = test_vqdmulhh (-32768, vcreate_s16 (0x0000ffff2489e398ULL));
expected = 1;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c
index b3ae37c..1015c68 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c
@@ -1,25 +1,27 @@
/* Test the vqdmulhh_laneq_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int16_t __attribute__((noipa))
+test_vqdmulhh (int16_t arg1, int16x8_t arg2)
+{
+ return vqdmulhh_laneq_s16 (arg1, arg2, 7);
+}
+
int
main (void)
{
- int16_t arg1;
- int16x8_t arg2;
int16_t actual;
int16_t expected;
- arg1 = 268;
- arg2 = vcombine_s16 (vcreate_s16 (0xffffffff00000000ULL),
- vcreate_s16 (0x0000800018410000ULL));
-
- actual = vqdmulhh_laneq_s16 (arg1, arg2, 7);
+ actual = test_vqdmulhh (268,
+ vcombine_s16 (vcreate_s16 (0xffffffff00000000ULL),
+ vcreate_s16 (0x0000800018410000ULL)));
expected = 0;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c
index eef3ac0..f3b297e 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c
@@ -1,25 +1,32 @@
/* Test the vqdmulhs_lane_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#include <stdio.h>
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqdmulhs_0 (int32_t arg1, int32x2_t arg2)
+{
+ return vqdmulhs_lane_s32 (arg1, arg2, 0);
+}
+
+int32_t __attribute__((noipa))
+test_vqdmulhs_1 (int32_t arg1, int32x2_t arg2)
+{
+ return vqdmulhs_lane_s32 (arg1, arg2, 1);
+}
+
int
main (void)
{
- int32_t arg1;
- int32x2_t arg2;
- int32_t result;
int32_t actual;
int32_t expected;
- arg1 = 57336;
- arg2 = vcreate_s32 (0x55897fff7fff0000ULL);
- actual = vqdmulhs_lane_s32 (arg1, arg2, 0);
+ actual = test_vqdmulhs_0 (57336, vcreate_s32 (0x55897fff7fff0000ULL));
expected = 57334;
if (expected != actual)
@@ -28,6 +35,16 @@ main (void)
abort ();
}
+ actual = test_vqdmulhs_1 (57336, vcreate_s32 (0x55897fff7fff0000ULL));
+ expected = 38315;
+
+ if (expected != actual)
+ {
+ fprintf (stderr, "Expected: %xd, got %xd\n", expected, actual);
+ abort ();
+ }
+
return 0;
}
-/* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+/* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?(?:\[sS\]\[0-9\]+|\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\])\n" 1 } } */
+/* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[1\\\]\n" 1 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c
index 71b2600..fd63bf9 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c
@@ -1,25 +1,27 @@
/* Test the vqdmulhs_laneq_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqdmulhs (int32_t arg1, int32x4_t arg2)
+{
+ return vqdmulhs_laneq_s32 (arg1, arg2, 3);
+}
+
int
main (void)
{
- int32_t arg1;
- int32x4_t arg2;
int32_t actual;
int32_t expected;
- arg1 = 0x80000000;
- arg2 = vcombine_s32 (vcreate_s32 (0x950dffffc4f40000ULL),
- vcreate_s32 (0x7fff8000274a8000ULL));
-
- actual = vqdmulhs_laneq_s32 (arg1, arg2, 3);
+ actual = test_vqdmulhs (0x80000000,
+ vcombine_s32 (vcreate_s32 (0x950dffffc4f40000ULL),
+ vcreate_s32 (0x7fff8000274a8000ULL)));
expected = -2147450880;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c
index aca96d1..7dddb75 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c
@@ -1,25 +1,26 @@
/* Test the vqrdmulhh_lane_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#include <stdio.h>
extern void abort (void);
+int16_t __attribute__((noipa))
+test_vqrdmulhh (int16_t arg1, int16x4_t arg2)
+{
+ return vqrdmulhh_lane_s16 (arg1, arg2, 3);
+}
+
int
main (void)
{
- int16_t arg1;
- int16x4_t arg2;
- int16_t result;
int16_t actual;
int16_t expected;
- arg1 = -32768;
- arg2 = vcreate_s16 (0xd78e000005d78000ULL);
- actual = vqrdmulhh_lane_s16 (arg1, arg2, 3);
+ actual = test_vqrdmulhh (-32768, vcreate_s16 (0xd78e000005d78000ULL));
expected = 10354;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c
index fd2c61d..78d6299 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c
@@ -1,25 +1,27 @@
/* Test the vqrdmulhh_laneq_s16 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int16_t __attribute__((noipa))
+test_vqrdmulhh (int16_t arg1, int16x8_t arg2)
+{
+ return vqrdmulhh_laneq_s16 (arg1, arg2, 7);
+}
+
int
main (void)
{
- int16_t arg1;
- int16x8_t arg2;
int16_t actual;
int16_t expected;
- arg1 = 0;
- arg2 = vcombine_s16 (vcreate_s16 (0x7fffffffa7908000ULL),
- vcreate_s16 (0x8000d2607fff0000ULL));
-
- actual = vqrdmulhh_laneq_s16 (arg1, arg2, 7);
+ actual = test_vqrdmulhh (0,
+ vcombine_s16 (vcreate_s16 (0x7fffffffa7908000ULL),
+ vcreate_s16 (0x8000d2607fff0000ULL)));
expected = 0;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c
index 30b21c9..827b52f 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c
@@ -1,25 +1,26 @@
/* Test the vqrdmulhs_lane_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#include <stdio.h>
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqrdmulhs (int32_t arg1, int32x2_t arg2)
+{
+ return vqrdmulhs_lane_s32 (arg1, arg2, 1);
+}
+
int
main (void)
{
- int32_t arg1;
- int32x2_t arg2;
- int32_t result;
int32_t actual;
int32_t expected;
- arg1 = -2099281921;
- arg2 = vcreate_s32 (0x000080007fff0000ULL);
- actual = vqrdmulhs_lane_s32 (arg1, arg2, 1);
+ actual = test_vqrdmulhs (-2099281921, vcreate_s32 (0x000080007fff0000ULL));
expected = -32033;
if (expected != actual)
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c
index 6d4e764..b06d16f 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c
@@ -1,25 +1,27 @@
/* Test the vqrdmulhs_laneq_s32 AArch64 SIMD intrinsic. */
/* { dg-do run } */
-/* { dg-options "-save-temps -O3 -fno-inline" } */
+/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
extern void abort (void);
+int32_t __attribute__((noipa))
+test_vqrdmulhs (int32_t arg1, int32x4_t arg2)
+{
+ return vqrdmulhs_laneq_s32 (arg1, arg2, 3);
+}
+
int
main (void)
{
- int32_t arg1;
- int32x4_t arg2;
int32_t actual;
int32_t expected;
- arg1 = 32768;
- arg2 = vcombine_s32 (vcreate_s32 (0x8000ffffffffcd5bULL),
- vcreate_s32 (0x7fffffffffffffffULL));
-
- actual = vqrdmulhs_laneq_s32 (arg1, arg2, 3);
+ actual = test_vqrdmulhs (32768,
+ vcombine_s32 (vcreate_s32 (0x8000ffffffffcd5bULL),
+ vcreate_s32 (0x7fffffffffffffffULL)));
expected = 32768;
if (expected != actual)