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| author | Tejas Belagod <tejas.belagod@arm.com> | 2012-12-04 11:43:04 +0000 |
|---|---|---|
| committer | Tejas Belagod <belagod@gcc.gnu.org> | 2012-12-04 11:43:04 +0000 |
| commit | db0253a428a3e553a3a8f4551819df44b893ecab (patch) | |
| tree | c6b6cf74611be587609cba012c66a550c0217d45 | |
| parent | c3dd8dd768d1a7af0058c4592d9e34b3b2a63fe9 (diff) | |
| download | gcc-db0253a428a3e553a3a8f4551819df44b893ecab.zip gcc-db0253a428a3e553a3a8f4551819df44b893ecab.tar.gz gcc-db0253a428a3e553a3a8f4551819df44b893ecab.tar.bz2 | |
aarch64.c (aarch64_simd_vector_alignment, [...]): New.
2012-12-04 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64.c (aarch64_simd_vector_alignment,
aarch64_simd_vector_alignment_reachable): New.
(TARGET_VECTOR_ALIGNMENT, TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE):
Define.
From-SVN: r194126
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 32 |
2 files changed, 39 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f602a12..38074eb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-12-04 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_vector_alignment, + aarch64_simd_vector_alignment_reachable): New. + (TARGET_VECTOR_ALIGNMENT, TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): + Define. + 2012-12-04 Richard Biener <rguenther@suse.de> PR tree-optimization/55124 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index f262ef9..bd72321 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -6316,6 +6316,31 @@ aarch64_simd_attr_length_move (rtx insn) return 4; } +/* Implement target hook TARGET_VECTOR_ALIGNMENT. The AAPCS64 sets the maximum + alignment of a vector to 128 bits. */ +static HOST_WIDE_INT +aarch64_simd_vector_alignment (const_tree type) +{ + HOST_WIDE_INT align = tree_low_cst (TYPE_SIZE (type), 0); + return MIN (align, 128); +} + +/* Implement target hook TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE. */ +static bool +aarch64_simd_vector_alignment_reachable (const_tree type, bool is_packed) +{ + if (is_packed) + return false; + + /* We guarantee alignment for vectors up to 128-bits. */ + if (tree_int_cst_compare (TYPE_SIZE (type), + bitsize_int (BIGGEST_ALIGNMENT)) > 0) + return false; + + /* Vectors whose size is <= BIGGEST_ALIGNMENT are naturally aligned. */ + return true; +} + static unsigned HOST_WIDE_INT aarch64_shift_truncation_mask (enum machine_mode mode) { @@ -6864,6 +6889,13 @@ aarch64_c_mode_for_suffix (char suffix) #undef TARGET_MAX_ANCHOR_OFFSET #define TARGET_MAX_ANCHOR_OFFSET 4095 +#undef TARGET_VECTOR_ALIGNMENT +#define TARGET_VECTOR_ALIGNMENT aarch64_simd_vector_alignment + +#undef TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE +#define TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE \ + aarch64_simd_vector_alignment_reachable + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-aarch64.h" |