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| author | Terry Guo <terry.guo@arm.com> | 2013-04-19 06:38:32 +0000 |
|---|---|---|
| committer | Xuepeng Guo <xguo@gcc.gnu.org> | 2013-04-19 06:38:32 +0000 |
| commit | dad89f7c034b3b8d8851ab9dc8960ee88d6ea784 (patch) | |
| tree | a1c45d14311abfd9c7aae4ca59f3726ee37676cf | |
| parent | f1e6512ce3f7fbc4cc8721cbe521ed03905fe67e (diff) | |
| download | gcc-dad89f7c034b3b8d8851ab9dc8960ee88d6ea784.zip gcc-dad89f7c034b3b8d8851ab9dc8960ee88d6ea784.tar.gz gcc-dad89f7c034b3b8d8851ab9dc8960ee88d6ea784.tar.bz2 | |
cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit.
* config/arm/cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit.
Replace with ...
(cortex_m4_v_a, cortex_m4_v_b): ... new cpu units.
(cortex_m4_v, cortex_m4_exa_va, cortex_m4_exb_vb): New reservations.
(cortex_m4_fmacs): Use new reservations.
(cortex_m4_f_load, cortex_m4_f_store): Likewise.
From-SVN: r198084
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/arm/cortex-m4-fpu.md | 18 |
2 files changed, 21 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cd26c92..77b8e2b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2013-04-19 Terry Guo <terry.guo@arm.com> + + * config/arm/cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit. + Replace with ... + (cortex_m4_v_a, cortex_m4_v_b): ... new cpu units. + (cortex_m4_v, cortex_m4_exa_va, cortex_m4_exb_vb): New reservations. + (cortex_m4_fmacs): Use new reservations. + (cortex_m4_f_load, cortex_m4_f_store): Likewise. + 2013-04-18 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/56999 diff --git a/gcc/config/arm/cortex-m4-fpu.md b/gcc/config/arm/cortex-m4-fpu.md index a1945be..4ce3f10 100644 --- a/gcc/config/arm/cortex-m4-fpu.md +++ b/gcc/config/arm/cortex-m4-fpu.md @@ -18,10 +18,14 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. -;; Use an artifial unit to model FPU. -(define_cpu_unit "cortex_m4_v" "cortex_m4") +;; Use two artificial units to model FPU. +(define_cpu_unit "cortex_m4_v_a" "cortex_m4") +(define_cpu_unit "cortex_m4_v_b" "cortex_m4") +(define_reservation "cortex_m4_v" "cortex_m4_v_a+cortex_m4_v_b") (define_reservation "cortex_m4_ex_v" "cortex_m4_ex+cortex_m4_v") +(define_reservation "cortex_m4_exa_va" "cortex_m4_a+cortex_m4_v_a") +(define_reservation "cortex_m4_exb_vb" "cortex_m4_b+cortex_m4_v_b") ;; Integer instructions following VDIV or VSQRT complete out-of-order. (define_insn_reservation "cortex_m4_fdivs" 15 @@ -44,10 +48,12 @@ (eq_attr "type" "fmuls")) "cortex_m4_ex_v") +;; Integer instructions following multiply-accumulate instructions +;; complete out-of-order. (define_insn_reservation "cortex_m4_fmacs" 4 (and (eq_attr "tune" "cortexm4") (eq_attr "type" "fmacs,ffmas")) - "cortex_m4_ex_v*3") + "cortex_m4_ex_v,cortex_m4_v*2") (define_insn_reservation "cortex_m4_ffariths" 1 (and (eq_attr "tune" "cortexm4") @@ -77,12 +83,12 @@ (define_insn_reservation "cortex_m4_f_load" 2 (and (eq_attr "tune" "cortexm4") (eq_attr "type" "f_loads")) - "cortex_m4_ex_v*2") + "cortex_m4_exa_va,cortex_m4_exb_vb") -(define_insn_reservation "cortex_m4_f_store" 2 +(define_insn_reservation "cortex_m4_f_store" 1 (and (eq_attr "tune" "cortexm4") (eq_attr "type" "f_stores")) - "cortex_m4_ex_v*2") + "cortex_m4_exa_va") (define_insn_reservation "cortex_m4_f_loadd" 3 (and (eq_attr "tune" "cortexm4") |