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| author | Sandra Loosemore <sandra@gcc.gnu.org> | 2012-08-15 22:17:19 -0400 |
|---|---|---|
| committer | Sandra Loosemore <sandra@gcc.gnu.org> | 2012-08-15 22:17:19 -0400 |
| commit | d34e7d4f2e3bad057ab9ba0f376d2bb7238270f0 (patch) | |
| tree | f50f26debd102c54085c30303af457b8b41dd671 | |
| parent | a9d2a88c55390736d1e948c0032e4aa79df59eda (diff) | |
| download | gcc-d34e7d4f2e3bad057ab9ba0f376d2bb7238270f0.zip gcc-d34e7d4f2e3bad057ab9ba0f376d2bb7238270f0.tar.gz gcc-d34e7d4f2e3bad057ab9ba0f376d2bb7238270f0.tar.bz2 | |
Revert unintended change from last commit
From-SVN: r190437
| -rw-r--r-- | gcc/config/mips/mips-dspr2.md | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/gcc/config/mips/mips-dspr2.md b/gcc/config/mips/mips-dspr2.md index 248e46e..0d02580 100644 --- a/gcc/config/mips/mips-dspr2.md +++ b/gcc/config/mips/mips-dspr2.md @@ -68,7 +68,6 @@ UNSPEC_DPAQX_SA_W_PH UNSPEC_DPSQX_S_W_PH UNSPEC_DPSQX_SA_W_PH - UNSPEC_ACC_INIT ]) (define_insn "mips_absq_s_qb" @@ -631,33 +630,3 @@ [(set_attr "type" "dspmacsat") (set_attr "accum_in" "1") (set_attr "mode" "SI")]) - -;; Convert mtlo $ac[1-3],$0 => mult $ac[1-3],$0,$0 -;; mthi $ac[1-3],$0 -(define_peephole2 - [(set (match_operand:SI 0 "register_operand" "") - (const_int 0)) - (set (match_operand:SI 1 "register_operand" "") - (const_int 0))] - "ISA_HAS_DSPR2 - && !TARGET_MIPS16 - && !TARGET_64BIT - && true_regnum (operands[0]) >= DSP_ACC_REG_FIRST - && true_regnum (operands[0]) <= DSP_ACC_REG_LAST - && true_regnum (operands[0]) / 2 == true_regnum (operands[1]) / 2" - [(parallel [(set (match_dup 0) (const_int 0)) - (set (match_dup 1) (const_int 0)) - (unspec [(const_int 0)] UNSPEC_ACC_INIT)])] -) - -(define_insn "*mips_acc_init" - [(parallel - [(set (match_operand:SI 0 "register_operand" "=a") (const_int 0)) - (set (match_operand:SI 1 "register_operand" "=a") (const_int 0)) - (unspec [(const_int 0)] UNSPEC_ACC_INIT)])] - "ISA_HAS_DSPR2 - && !TARGET_MIPS16 - && !TARGET_64BIT" - "mult\t%q0,$0,$0\t\t# Clear ACC HI/LO" - [(set_attr "type" "imul") - (set_attr "mode" "SI")]) |