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authorLulu Cheng <chenglulu@loongson.cn>2023-04-13 19:24:38 +0800
committerLulu Cheng <chenglulu@loongson.cn>2023-04-18 09:05:50 +0800
commitd2ee685f6fa922e97908ed998d14def9e01e1e4e (patch)
tree75828eed6d8ce0786d3958ce8dd123cd9461f95e
parent5015cdf3155c80e5fd61f7b6ab8082ee849e3e90 (diff)
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LoongArch: Remove the definition of the macro LOGICAL_OP_NON_SHORT_CIRCUIT under the architecture and use the default definition instead.
In some cases, setting this macro as the default can reduce the number of conditional branch instructions. gcc/ChangeLog: * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro definition.
-rw-r--r--gcc/config/loongarch/loongarch.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index f816787..6b7dbec 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -836,7 +836,6 @@ typedef struct {
1 is the default; other values are interpreted relative to that. */
#define BRANCH_COST(speed_p, predictable_p) loongarch_branch_cost
-#define LOGICAL_OP_NON_SHORT_CIRCUIT 0
/* Return the asm template for a conditional branch instruction.
OPCODE is the opcode's mnemonic and OPERANDS is the asm template for