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| author | Anatoly Sokolov <aesok@post.ru> | 2010-09-20 23:30:31 +0400 |
|---|---|---|
| committer | Anatoly Sokolov <aesok@gcc.gnu.org> | 2010-09-20 23:30:31 +0400 |
| commit | d163e655d56e82d9e01cc5e4556c3a0888b54139 (patch) | |
| tree | 2c741df96f9251e763e0fe1521001f1f895e2ebe | |
| parent | 382eb33c14e9680c8907968f937ed89bc501bfe8 (diff) | |
| download | gcc-d163e655d56e82d9e01cc5e4556c3a0888b54139.zip gcc-d163e655d56e82d9e01cc5e4556c3a0888b54139.tar.gz gcc-d163e655d56e82d9e01cc5e4556c3a0888b54139.tar.bz2 | |
arm.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Remove.
* config/arm/arm.c (TARGET_CLASS_LIKELY_SPILLED_P): Define.
(arm_class_likely_spilled_p): New function.
From-SVN: r164450
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 20 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 7 |
3 files changed, 26 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 88f350e..4e6b97c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2010-09-20 Anatoly Sokolov <aesok@post.ru> + + * config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Remove. + * config/arm/arm.c (TARGET_CLASS_LIKELY_SPILLED_P): Define. + (arm_class_likely_spilled_p): New function. + 2010-09-20 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.c (ix86_expand_ashl_const): Rewrite using diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7cb3186..0701b48 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -239,6 +239,7 @@ static rtx arm_pic_static_addr (rtx orig, rtx reg); static bool cortex_a9_sched_adjust_cost (rtx, rtx, rtx, int *); static bool xscale_sched_adjust_cost (rtx, rtx, rtx, int *); static unsigned int arm_units_per_simd_word (enum machine_mode); +static bool arm_class_likely_spilled_p (reg_class_t); /* Table of machine attributes. */ @@ -545,6 +546,9 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_CAN_ELIMINATE #define TARGET_CAN_ELIMINATE arm_can_eliminate +#undef TARGET_CLASS_LIKELY_SPILLED_P +#define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ @@ -21952,6 +21956,22 @@ arm_units_per_simd_word (enum machine_mode mode ATTRIBUTE_UNUSED) ? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD); } +/* Implement TARGET_CLASS_LIKELY_SPILLED_P. + + We need to define this for LO_REGS on thumb. Otherwise we can end up + using r0-r4 for function arguments, r7 for the stack frame and don't + have enough left over to do doubleword arithmetic. */ + +static bool +arm_class_likely_spilled_p (reg_class_t rclass) +{ + if ((TARGET_THUMB && rclass == LO_REGS) + || rclass == CC_REG) + return true; + + return false; +} + /* Implements target hook small_register_classes_for_mode_p. */ bool arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8727305..2252a25 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1284,13 +1284,6 @@ enum reg_class || reg_classes_intersect_p (VFP_REGS, (CLASS)) \ : 0) -/* We need to define this for LO_REGS on thumb. Otherwise we can end up - using r0-r4 for function arguments, r7 for the stack frame and don't - have enough left over to do doubleword arithmetic. */ -#define CLASS_LIKELY_SPILLED_P(CLASS) \ - ((TARGET_THUMB && (CLASS) == LO_REGS) \ - || (CLASS) == CC_REG) - /* The class value for index registers, and the one for base regs. */ #define INDEX_REG_CLASS (TARGET_THUMB1 ? LO_REGS : GENERAL_REGS) #define BASE_REG_CLASS (TARGET_THUMB1 ? LO_REGS : CORE_REGS) |