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| author | Jim Wilson <wilson@gcc.gnu.org> | 1993-09-08 12:15:32 -0700 |
|---|---|---|
| committer | Jim Wilson <wilson@gcc.gnu.org> | 1993-09-08 12:15:32 -0700 |
| commit | d1460eef26e329523204fd8dfadba5f2189a704b (patch) | |
| tree | 7d6e80b46c74e72727789aff1228e390d924254a | |
| parent | 0ff763984912590ad1e5452d7203f33484d6c118 (diff) | |
| download | gcc-d1460eef26e329523204fd8dfadba5f2189a704b.zip gcc-d1460eef26e329523204fd8dfadba5f2189a704b.tar.gz gcc-d1460eef26e329523204fd8dfadba5f2189a704b.tar.bz2 | |
(fix_truncdfsi2, fixtruncsfsi2): Mark SImode scratch
register as early clobbered when dest is in memory.
From-SVN: r5290
| -rw-r--r-- | gcc/config/mips/mips.md | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 3a0b684..2fc85e5 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1475,10 +1475,14 @@ move\\t%0,%z4\\n\\ ;; ;; .................... +;; The SImode scratch register can not be shared with address regs used for +;; operand zero, because then the address in the move instruction will be +;; clobbered. We mark the scratch register as early clobbered to prevent this. + (define_insn "fix_truncdfsi2" [(set (match_operand:SI 0 "general_operand" "=d,*f,R,o") (fix:SI (match_operand:DF 1 "register_operand" "f,*f,f,f"))) - (clobber (match_scratch:SI 2 "=d,*d,d,d")) + (clobber (match_scratch:SI 2 "=d,*d,&d,&d")) (clobber (match_scratch:DF 3 "=f,*X,f,f"))] "TARGET_HARD_FLOAT" "* @@ -1503,7 +1507,7 @@ move\\t%0,%z4\\n\\ (define_insn "fix_truncsfsi2" [(set (match_operand:SI 0 "general_operand" "=d,*f,R,o") (fix:SI (match_operand:SF 1 "register_operand" "f,*f,f,f"))) - (clobber (match_scratch:SI 2 "=d,*d,d,d")) + (clobber (match_scratch:SI 2 "=d,*d,&d,&d")) (clobber (match_scratch:SF 3 "=f,*X,f,f"))] "TARGET_HARD_FLOAT" "* |